drm/msm/dpu: merge base_off with blk_off in struct dpu_hw_blk_reg_map

There is little point in keeping a separate MDP address and block offset
in this struct. Merge them to form a new blk_addr field used for all
register access.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/488017/
Link: https://lore.kernel.org/r/20220601161349.1517667-4-dmitry.baryshkov@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
index 1120ff408daec0c068de75cd248e9346436f4439..e12b7fa48a7b3a0a03798b567d9fe34ea61be2f9 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
@@ -58,8 +58,7 @@ static const struct dpu_ctl_cfg *_ctl_offset(enum dpu_ctl ctl,
 
        for (i = 0; i < m->ctl_count; i++) {
                if (ctl == m->ctl[i].id) {
-                       b->base_off = addr;
-                       b->blk_off = m->ctl[i].base;
+                       b->blk_addr = addr + m->ctl[i].base;
                        b->log_mask = DPU_DBG_MASK_CTL;
                        return &m->ctl[i];
                }

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
index dfe6e4c119172b79af0170a7cdb820e44a41a4b3..411689ae638259452f3b525893c41f0c4d20732c 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
@@ -166,8 +166,7 @@ static struct dpu_dsc_cfg *_dsc_offset(enum dpu_dsc dsc,
 
        for (i = 0; i < m->dsc_count; i++) {
                if (dsc == m->dsc[i].id) {
-                       b->base_off = addr;
-                       b->blk_off = m->dsc[i].base;
+                       b->blk_addr = addr + m->dsc[i].base;
                        b->log_mask = DPU_DBG_MASK_DSC;
                        return &m->dsc[i];
                }

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
index 8196ae47dea8fee7edf86349c28686042ab1307c..8ab5ace34a2d5b7d0b372e7bfc46b7cd680b0e18 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
@@ -80,8 +80,7 @@ static const struct dpu_dspp_cfg *_dspp_offset(enum dpu_dspp dspp,
 
        for (i = 0; i < m->dspp_count; i++) {
                if (dspp == m->dspp[i].id) {
-                       b->base_off = addr;
-                       b->blk_off = m->dspp[i].base;
+                       b->blk_addr = addr + m->dspp[i].base;
                        b->log_mask = DPU_DBG_MASK_DSPP;
                        return &m->dspp[i];
                }

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
index d83503ea2419a27cdb0871a1a2edbbf5aaa7dc05..cf1b6d84c18a3c750710263005d08ff8ee0212f9 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
@@ -401,8 +401,7 @@ u32 dpu_core_irq_read(struct dpu_kms *dpu_kms, int irq_idx)
 static void __intr_offset(const struct dpu_mdss_cfg *m,
                void __iomem *addr, struct dpu_hw_blk_reg_map *hw)
 {
-       hw->base_off = addr;
-       hw->blk_off = m->mdp[0].base;
+       hw->blk_addr = addr + m->mdp[0].base;
 }
 
 struct dpu_hw_intr *dpu_hw_intr_init(void __iomem *addr,

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
index 3ae2a2c1cd9d63c08314ef634d9d5fe9070bd6ea..7ce66bf3f4c8d7ccf46c99e5ca1fe78dd2dca768 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
@@ -82,8 +82,7 @@ static const struct dpu_intf_cfg *_intf_offset(enum dpu_intf intf,
        for (i = 0; i < m->intf_count; i++) {
                if ((intf == m->intf[i].id) &&
                (m->intf[i].type != INTF_NONE)) {
-                       b->base_off = addr;
-                       b->blk_off = m->intf[i].base;
+                       b->blk_addr = addr + m->intf[i].base;
                        b->log_mask = DPU_DBG_MASK_INTF;
                        return &m->intf[i];
                }

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
index 9a1e91962ae732feb1013e4a70015a8fe0c5861e..f5120ea91edee8d7f269e7bc2e4df386c7c82179 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
@@ -39,8 +39,7 @@ static const struct dpu_lm_cfg *_lm_offset(enum dpu_lm mixer,
 
        for (i = 0; i < m->mixer_count; i++) {
                if (mixer == m->mixer[i].id) {
-                       b->base_off = addr;
-                       b->blk_off = m->mixer[i].base;
+                       b->blk_addr = addr + m->mixer[i].base;
                        b->log_mask = DPU_DBG_MASK_LM;
                        return &m->mixer[i];
                }

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c
index 538691f7bf660f6a471e11c61cbeb070f8814647..def0a87fdba56711b6544d9ac3a64e362b106d0e 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c
@@ -23,8 +23,7 @@ static const struct dpu_merge_3d_cfg *_merge_3d_offset(enum dpu_merge_3d idx,
 
        for (i = 0; i < m->merge_3d_count; i++) {
                if (idx == m->merge_3d[i].id) {
-                       b->base_off = addr;
-                       b->blk_off = m->merge_3d[i].base;
+                       b->blk_addr = addr + m->merge_3d[i].base;
                        b->log_mask = DPU_DBG_MASK_PINGPONG;
                        return &m->merge_3d[i];
                }

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
index 0aa63636bc9a8ff26350d7be649b15443af458e3..0fcad9760b6fcde2770dbe2100c5cee0d4da6865 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
@@ -51,8 +51,7 @@ static const struct dpu_pingpong_cfg *_pingpong_offset(enum dpu_pingpong pp,
 
        for (i = 0; i < m->pingpong_count; i++) {
                if (pp == m->pingpong[i].id) {
-                       b->base_off = addr;
-                       b->blk_off = m->pingpong[i].base;
+                       b->blk_addr = addr + m->pingpong[i].base;
                        b->log_mask = DPU_DBG_MASK_PINGPONG;
                        return &m->pingpong[i];
                }
@@ -156,7 +155,7 @@ static int dpu_hw_pp_poll_timeout_wr_ptr(struct dpu_hw_pingpong *pp,
                return -EINVAL;
 
        c = &pp->hw;
-       rc = readl_poll_timeout(c->base_off + c->blk_off + PP_LINE_COUNT,
+       rc = readl_poll_timeout(c->blk_addr + PP_LINE_COUNT,
                        val, (val & 0xffff) >= 1, 10, timeout_us);
 
        return rc;

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
index 876ae8faa8e5fd43be881c55897ef05508bd21ed..102c21bb4192130c14f63b697627da984405ae97 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
@@ -769,8 +769,7 @@ static const struct dpu_sspp_cfg *_sspp_offset(enum dpu_sspp sspp,
        if ((sspp < SSPP_MAX) && catalog && addr && b) {
                for (i = 0; i < catalog->sspp_count; i++) {
                        if (sspp == catalog->sspp[i].id) {
-                               b->base_off = addr;
-                               b->blk_off = catalog->sspp[i].base;
+                               b->blk_addr = addr + catalog->sspp[i].base;
                                b->log_mask = DPU_DBG_MASK_SSPP;
                                return &catalog->sspp[i];
                        }

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
index 843cb607d411f468f2810a45f46bb46b36f666b8..c3110a25a30d09834a23ba73d8dc69a0c348537c 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
@@ -285,8 +285,7 @@ static const struct dpu_mdp_cfg *_top_offset(enum dpu_mdp mdp,
 
        for (i = 0; i < m->mdp_count; i++) {
                if (mdp == m->mdp[i].id) {
-                       b->base_off = addr;
-                       b->blk_off = m->mdp[i].base;
+                       b->blk_addr = addr + m->mdp[i].base;
                        b->log_mask = DPU_DBG_MASK_TOP;
                        return &m->mdp[i];
                }

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c
index a679757159e92ebbb739e8ffc4114bcfe9c857db..8062228eada687dcfb074b292eb97d6359e0730d 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c
@@ -82,13 +82,13 @@ void dpu_reg_write(struct dpu_hw_blk_reg_map *c,
        /* don't need to mutex protect this */
        if (c->log_mask & dpu_hw_util_log_mask)
                DPU_DEBUG_DRIVER("[%s:0x%X] <= 0x%X\n",
-                               name, c->blk_off + reg_off, val);
-       writel_relaxed(val, c->base_off + c->blk_off + reg_off);
+                               name, reg_off, val);
+       writel_relaxed(val, c->blk_addr + reg_off);
 }
 
 int dpu_reg_read(struct dpu_hw_blk_reg_map *c, u32 reg_off)
 {
-       return readl_relaxed(c->base_off + c->blk_off + reg_off);
+       return readl_relaxed(c->blk_addr + reg_off);
 }
 
 u32 *dpu_hw_util_get_log_mask_ptr(void)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h
index 28200d31bc5b379be75a7d600ad8a26ee1232a74..b392e5c4f89581a34e37efe2dd30d0061031197e 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h
@@ -23,12 +23,11 @@
  * This is the common struct maintained by each sub block
  * for mapping the register offsets in this block to the
  * absoulute IO address
- * @base_off:     mdp register mapped offset
- * @blk_off:      pipe offset relative to mdss offset
+ * @blk_addr:     hw block register mapped address
+ * @log_mask:     log mask for this block
  */
 struct dpu_hw_blk_reg_map {
-       void __iomem *base_off;
-       u32 blk_off;
+       void __iomem *blk_addr;
        u32 log_mask;
 };
 

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c
index 41ca4b179f1a7301bb4260b6725413a822d067e4..16c56e2407064bd1c2e7611982ace5fd234a5849 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c
@@ -220,8 +220,7 @@ static const struct dpu_vbif_cfg *_top_offset(enum dpu_vbif vbif,
 
        for (i = 0; i < m->vbif_count; i++) {
                if (vbif == m->vbif[i].id) {
-                       b->base_off = addr;
-                       b->blk_off = m->vbif[i].base;
+                       b->blk_addr = addr + m->vbif[i].base;
                        b->log_mask = DPU_DBG_MASK_VBIF;
                        return &m->vbif[i];
                }

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c
index 12f32cd3075eefc38176d6992de56767a490461f..2d28afdf860efc43709e1c648be6607763ef4603 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c
@@ -60,8 +60,7 @@ static const struct dpu_wb_cfg *_wb_offset(enum dpu_wb wb,
 
        for (i = 0; i < m->wb_count; i++) {
                if (wb == m->wb[i].id) {
-                       b->base_off = addr;
-                       b->blk_off = m->wb[i].base;
+                       b->blk_addr = addr + m->wb[i].base;
                        return &m->wb[i];
                }
        }

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 457f9c911e92f1f4fbb143d50c0b325fbae0cdf4..26d32cd772c18f979fc4241e1247a0117bcb8c89 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -946,7 +946,7 @@ static void dpu_kms_mdp_snapshot(struct msm_disp_state *disp_state, struct msm_k
                                dpu_kms->mmio + cat->wb[i].base, "wb_%d", i);
 
        msm_disp_snapshot_add_block(disp_state, cat->mdp[0].len,
-                       dpu_kms->mmio + top->hw.blk_off, "top");
+                       dpu_kms->mmio + cat->mdp[0].base, "top");
 
        pm_runtime_put_sync(&dpu_kms->pdev->dev);
 }