coresight: etm: Make cycle count threshold user configurable

When cycle counting is enabled, we use a default threshold value i.e 0x100
for the instruction trace cycle counting.

This patch makes the cycle threshold user configurable via perf event
attributes( 'cc_threshold' => event->attr.config3[11:0] ), falling back
to the current default if unspecified.

Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: James Clark <james.clark@arm.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: coresight@lists.linaro.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-doc@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230921033631.1298723-3-anshuman.khandual@arm.com

diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c
index 89e8ed214ea4967620c20ad1c1a1e39f9d068400..a52cfcce25d6ddef4ee48eac1f049f7b13143b50 100644 (file)
--- a/drivers/hwtracing/coresight/coresight-etm-perf.c
+++ b/drivers/hwtracing/coresight/coresight-etm-perf.c
@@ -68,6 +68,7 @@ PMU_FORMAT_ATTR(preset,               "config:0-3");
 PMU_FORMAT_ATTR(sinkid,                "config2:0-31");
 /* config ID - set if a system configuration is selected */
 PMU_FORMAT_ATTR(configid,      "config2:32-63");
+PMU_FORMAT_ATTR(cc_threshold,  "config3:0-11");
 
 
 /*
@@ -101,6 +102,7 @@ static struct attribute *etm_config_formats_attr[] = {
        &format_attr_preset.attr,
        &format_attr_configid.attr,
        &format_attr_branch_broadcast.attr,
+       &format_attr_cc_threshold.attr,
        NULL,
 };
 

diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
index 5feb2bd41ee59f4497b37514ded4b11cc3615283..285539104bcc426dd44609333fbc01d74e020485 100644 (file)
--- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
@@ -644,7 +644,7 @@ static int etm4_parse_event_config(struct coresight_device *csdev,
        struct etmv4_config *config = &drvdata->config;
        struct perf_event_attr *attr = &event->attr;
        unsigned long cfg_hash;
-       int preset;
+       int preset, cc_threshold;
 
        /* Clear configuration from previous run */
        memset(config, 0, sizeof(struct etmv4_config));
@@ -667,7 +667,12 @@ static int etm4_parse_event_config(struct coresight_device *csdev,
        if (attr->config & BIT(ETM_OPT_CYCACC)) {
                config->cfg |= TRCCONFIGR_CCI;
                /* TRM: Must program this for cycacc to work */
-               config->ccctlr = ETM_CYC_THRESHOLD_DEFAULT;
+               cc_threshold = attr->config3 & ETM_CYC_THRESHOLD_MASK;
+               if (!cc_threshold)
+                       cc_threshold = ETM_CYC_THRESHOLD_DEFAULT;
+               if (cc_threshold < drvdata->ccitmin)
+                       cc_threshold = drvdata->ccitmin;
+               config->ccctlr = cc_threshold;
        }
        if (attr->config & BIT(ETM_OPT_TS)) {
                /*