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arm64: dts: st: add rcc support for STM32MP25
authorGabriel Fernandez <gabriel.fernandez@foss.st.com>
Thu, 11 Apr 2024 09:24:53 +0000 (11:24 +0200)
committerAlexandre Torgue <alexandre.torgue@foss.st.com>
Thu, 25 Apr 2024 13:00:30 +0000 (15:00 +0200)
Add RCC support to manage clocks and resets on the STM32MP25.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
arch/arm64/boot/dts/st/stm32mp251.dtsi patch | blob | history
arch/arm64/boot/dts/st/stm32mp255.dtsi patch | blob | history

diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
index af1444bf94420ae3869c67a45a287a7294ab016f..193808919e8339f26f52044a6c521e381805fec1 100644 (file)
--- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
@@ -3,7 +3,9 @@
  * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
  * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
  */
+#include <dt-bindings/clock/st,stm32mp25-rcc.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/reset/st,stm32mp25-rcc.h>
 
 / {
        #address-cells = <2>;
@@ -35,34 +37,16 @@
        };
 
        clocks {
-               ck_flexgen_08: ck-flexgen-08 {
+               clk_dsi_txbyte: txbyteclk {
                        #clock-cells = <0>;
                        compatible = "fixed-clock";
-                       clock-frequency = <100000000>;
+                       clock-frequency = <0>;
                };
 
-               ck_flexgen_51: ck-flexgen-51 {
+               clk_rcbsec: clk-rcbsec {
                        #clock-cells = <0>;
                        compatible = "fixed-clock";
-                       clock-frequency = <200000000>;
-               };
-
-               ck_icn_ls_mcu: ck-icn-ls-mcu {
-                       #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <200000000>;
-               };
-
-               ck_icn_p_vdec: ck-icn-p-vdec {
-                       #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <200000000>;
-               };
-
-               ck_icn_p_venc: ck-icn-p-venc {
-                       #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <200000000>;
+                       clock-frequency = <64000000>;
                };
        };
 
@@ -135,7 +119,7 @@
                                compatible = "st,stm32h7-uart";
                                reg = <0x400e0000 0x400>;
                                interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
-                               clocks = <&ck_flexgen_08>;
+                               clocks = <&rcc CK_KER_USART2>;
                                access-controllers = <&rifsc 32>;
                                status = "disabled";
                        };
@@ -145,8 +129,9 @@
                                arm,primecell-periphid = <0x00353180>;
                                reg = <0x48220000 0x400>, <0x44230400 0x8>;
                                interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
-                               clocks = <&ck_flexgen_51>;
+                               clocks = <&rcc CK_KER_SDMMC1 >;
                                clock-names = "apb_pclk";
+                               resets = <&rcc SDMMC1_R>;
                                cap-sd-highspeed;
                                cap-mmc-highspeed;
                                max-frequency = <120000000>;
@@ -171,6 +156,93 @@
                        };
                };
 
+               rcc: clock-controller@44200000 {
+                       compatible = "st,stm32mp25-rcc";
+                       reg = <0x44200000 0x10000>;
+                       #clock-cells = <1>;
+                       #reset-cells = <1>;
+                       clocks = <&scmi_clk CK_SCMI_HSE>,
+                               <&scmi_clk CK_SCMI_HSI>,
+                               <&scmi_clk CK_SCMI_MSI>,
+                               <&scmi_clk CK_SCMI_LSE>,
+                               <&scmi_clk CK_SCMI_LSI>,
+                               <&scmi_clk CK_SCMI_HSE_DIV2>,
+                               <&scmi_clk CK_SCMI_ICN_HS_MCU>,
+                               <&scmi_clk CK_SCMI_ICN_LS_MCU>,
+                               <&scmi_clk CK_SCMI_ICN_SDMMC>,
+                               <&scmi_clk CK_SCMI_ICN_DDR>,
+                               <&scmi_clk CK_SCMI_ICN_DISPLAY>,
+                               <&scmi_clk CK_SCMI_ICN_HSL>,
+                               <&scmi_clk CK_SCMI_ICN_NIC>,
+                               <&scmi_clk CK_SCMI_ICN_VID>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_07>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_08>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_09>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_10>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_11>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_12>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_13>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_14>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_15>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_16>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_17>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_18>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_19>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_20>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_21>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_22>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_23>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_24>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_25>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_26>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_27>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_28>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_29>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_30>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_31>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_32>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_33>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_34>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_35>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_36>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_37>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_38>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_39>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_40>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_41>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_42>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_43>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_44>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_45>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_46>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_47>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_48>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_49>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_50>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_51>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_52>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_53>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_54>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_55>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_56>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_57>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_58>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_59>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_60>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_61>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_62>,
+                               <&scmi_clk CK_SCMI_FLEXGEN_63>,
+                               <&scmi_clk CK_SCMI_ICN_APB1>,
+                               <&scmi_clk CK_SCMI_ICN_APB2>,
+                               <&scmi_clk CK_SCMI_ICN_APB3>,
+                               <&scmi_clk CK_SCMI_ICN_APB4>,
+                               <&scmi_clk CK_SCMI_ICN_APBDBG>,
+                               <&scmi_clk CK_SCMI_TIMG1>,
+                               <&scmi_clk CK_SCMI_TIMG2>,
+                               <&scmi_clk CK_SCMI_PLL3>,
+                               <&clk_dsi_txbyte>;
+               };
+
                syscfg: syscon@44230000 {
                        compatible = "st,stm32mp25-syscfg", "syscon";
                        reg = <0x44230000 0x10000>;
@@ -189,7 +261,7 @@
                                interrupt-controller;
                                #interrupt-cells = <2>;
                                reg = <0x0 0x400>;
-                               clocks = <&ck_icn_ls_mcu>;
+                               clocks = <&scmi_clk CK_SCMI_GPIOA>;
                                st,bank-name = "GPIOA";
                                status = "disabled";
                        };
@@ -200,7 +272,7 @@
                                interrupt-controller;
                                #interrupt-cells = <2>;
                                reg = <0x10000 0x400>;
-                               clocks = <&ck_icn_ls_mcu>;
+                               clocks = <&scmi_clk CK_SCMI_GPIOB>;
                                st,bank-name = "GPIOB";
                                status = "disabled";
                        };
@@ -211,7 +283,7 @@
                                interrupt-controller;
                                #interrupt-cells = <2>;
                                reg = <0x20000 0x400>;
-                               clocks = <&ck_icn_ls_mcu>;
+                               clocks = <&scmi_clk CK_SCMI_GPIOC>;
                                st,bank-name = "GPIOC";
                                status = "disabled";
                        };
@@ -222,7 +294,7 @@
                                interrupt-controller;
                                #interrupt-cells = <2>;
                                reg = <0x30000 0x400>;
-                               clocks = <&ck_icn_ls_mcu>;
+                               clocks = <&scmi_clk CK_SCMI_GPIOD>;
                                st,bank-name = "GPIOD";
                                status = "disabled";
                        };
@@ -233,7 +305,7 @@
                                interrupt-controller;
                                #interrupt-cells = <2>;
                                reg = <0x40000 0x400>;
-                               clocks = <&ck_icn_ls_mcu>;
+                               clocks = <&scmi_clk CK_SCMI_GPIOE>;
                                st,bank-name = "GPIOE";
                                status = "disabled";
                        };
@@ -244,7 +316,7 @@
                                interrupt-controller;
                                #interrupt-cells = <2>;
                                reg = <0x50000 0x400>;
-                               clocks = <&ck_icn_ls_mcu>;
+                               clocks = <&scmi_clk CK_SCMI_GPIOF>;
                                st,bank-name = "GPIOF";
                                status = "disabled";
                        };
@@ -255,7 +327,7 @@
                                interrupt-controller;
                                #interrupt-cells = <2>;
                                reg = <0x60000 0x400>;
-                               clocks = <&ck_icn_ls_mcu>;
+                               clocks = <&scmi_clk CK_SCMI_GPIOG>;
                                st,bank-name = "GPIOG";
                                status = "disabled";
                        };
@@ -266,7 +338,7 @@
                                interrupt-controller;
                                #interrupt-cells = <2>;
                                reg = <0x70000 0x400>;
-                               clocks = <&ck_icn_ls_mcu>;
+                               clocks = <&scmi_clk CK_SCMI_GPIOH>;
                                st,bank-name = "GPIOH";
                                status = "disabled";
                        };
@@ -277,7 +349,7 @@
                                interrupt-controller;
                                #interrupt-cells = <2>;
                                reg = <0x80000 0x400>;
-                               clocks = <&ck_icn_ls_mcu>;
+                               clocks = <&scmi_clk CK_SCMI_GPIOI>;
                                st,bank-name = "GPIOI";
                                status = "disabled";
                        };
@@ -288,7 +360,7 @@
                                interrupt-controller;
                                #interrupt-cells = <2>;
                                reg = <0x90000 0x400>;
-                               clocks = <&ck_icn_ls_mcu>;
+                               clocks = <&scmi_clk CK_SCMI_GPIOJ>;
                                st,bank-name = "GPIOJ";
                                status = "disabled";
                        };
@@ -299,7 +371,7 @@
                                interrupt-controller;
                                #interrupt-cells = <2>;
                                reg = <0xa0000 0x400>;
-                               clocks = <&ck_icn_ls_mcu>;
+                               clocks = <&scmi_clk CK_SCMI_GPIOK>;
                                st,bank-name = "GPIOK";
                                status = "disabled";
                        };
@@ -318,7 +390,7 @@
                                interrupt-controller;
                                #interrupt-cells = <2>;
                                reg = <0 0x400>;
-                               clocks = <&ck_icn_ls_mcu>;
+                               clocks = <&scmi_clk CK_SCMI_GPIOZ>;
                                st,bank-name = "GPIOZ";
                                st,bank-ioport = <11>;
                                status = "disabled";
diff --git a/arch/arm64/boot/dts/st/stm32mp255.dtsi b/arch/arm64/boot/dts/st/stm32mp255.dtsi
index 570c5dd0b2c3026756ad781c84089e8ee7291ebf..f689b47c5010033120146cf1954d6624c0270045 100644 (file)
--- a/arch/arm64/boot/dts/st/stm32mp255.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp255.dtsi
@@ -10,7 +10,7 @@
                compatible = "st,stm32mp25-vdec";
                reg = <0x480d0000 0x3c8>;
                interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&ck_icn_p_vdec>;
+               clocks = <&rcc CK_BUS_VDEC>;
                access-controllers = <&rifsc 89>;
 
        };
@@ -19,7 +19,7 @@
                compatible = "st,stm32mp25-venc";
                reg = <0x480e0000 0x800>;
                interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&ck_icn_ls_mcu>;
+               clocks = <&rcc CK_BUS_VENC>;
                access-controllers = <&rifsc 90>;
        };
 };
\ No newline at end of file
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