drm/amd/pp: Refine pp_dpm_force_clock_level functions

Only when user set manual performance mode, driver
enable pp_dpm_force_clock_level.
so check the mode in pp_dpm_force_clock_level,
and delete the same logic in callback functions.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
index 5ceb5a226a1d8844b6f5691b5452d64353e8b30a..5f61e7000a00f7be605ff1fb49188fa33976d24c 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
@@ -6639,9 +6639,7 @@ static int ci_dpm_force_clock_level(void *handle,
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
        struct ci_power_info *pi = ci_get_pi(adev);
 
-       if (adev->pm.dpm.forced_level & (AMD_DPM_FORCED_LEVEL_AUTO |
-                               AMD_DPM_FORCED_LEVEL_LOW |
-                               AMD_DPM_FORCED_LEVEL_HIGH))
+       if (adev->pm.dpm.forced_level != AMD_DPM_FORCED_LEVEL_MANUAL)
                return -EINVAL;
 
        switch (type) {

diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index 87117b1e51dc2b0be4e757fad76c6980be34fcc9..27083bee55e30c70194430d05348a097a6f41b89 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -839,7 +839,10 @@ static int pp_dpm_force_clock_level(void *handle,
                return 0;
        }
        mutex_lock(&pp_handle->pp_lock);
-       hwmgr->hwmgr_func->force_clock_level(hwmgr, type, mask);
+       if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL)
+               ret = hwmgr->hwmgr_func->force_clock_level(hwmgr, type, mask);
+       else
+               ret = -EINVAL;
        mutex_unlock(&pp_handle->pp_lock);
        return ret;
 }

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
index 1394b2b426b583f0c25dad8f0dd2c84a0f44c401..5a7b99f45d36b3ef833c73ceccfab36ef89aa5cb 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
@@ -1558,9 +1558,6 @@ static int cz_get_dal_power_level(struct pp_hwmgr *hwmgr,
 static int cz_force_clock_level(struct pp_hwmgr *hwmgr,
                enum pp_clock_type type, uint32_t mask)
 {
-       if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL)
-               return -EINVAL;
-
        switch (type) {
        case PP_SCLK:
                smum_send_msg_to_smc_with_parameter(hwmgr,

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index 21b9fa2db1e9a645d5fe95d5a300ddf00942f632..0c2e025dfc94063a5b8fccdf1b162aeb077e7f7d 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -4296,11 +4296,6 @@ static int smu7_force_clock_level(struct pp_hwmgr *hwmgr,
 {
        struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
 
-       if (hwmgr->request_dpm_level & (AMD_DPM_FORCED_LEVEL_AUTO |
-                                       AMD_DPM_FORCED_LEVEL_LOW |
-                                       AMD_DPM_FORCED_LEVEL_HIGH))
-               return -EINVAL;
-
        switch (type) {
        case PP_SCLK:
                if (!data->sclk_dpm_key_disabled)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
index 4c259cd2693f70276a792651be5be77f53aaaa8c..5e3c63f8b62a8d734baa1645add48a2e9c6ea095 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
@@ -4500,11 +4500,6 @@ static int vega10_force_clock_level(struct pp_hwmgr *hwmgr,
 {
        struct vega10_hwmgr *data = (struct vega10_hwmgr *)(hwmgr->backend);
 
-       if (hwmgr->request_dpm_level & (AMD_DPM_FORCED_LEVEL_AUTO |
-                               AMD_DPM_FORCED_LEVEL_LOW |
-                               AMD_DPM_FORCED_LEVEL_HIGH))
-               return -EINVAL;
-
        switch (type) {
        case PP_SCLK:
                data->smc_state_table.gfx_boot_level = mask ? (ffs(mask) - 1) : 0;