dt-bindings: arm: msm: Update the maintainers for LLCC
authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Tue, 14 Mar 2023 08:04:30 +0000 (13:34 +0530)
committerBjorn Andersson <andersson@kernel.org>
Wed, 15 Mar 2023 22:17:08 +0000 (15:17 -0700)
Both Rishabh and Sai have left Qualcomm, and there is no evidence of them
maintaining with a new identity. So their entry needs to be removed.

Listed Bjorn as the interim maintainer until someone volunteers to maintain
this binding.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230314080443.64635-2-manivannan.sadhasivam@linaro.org
Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml

index 38efcad56dbdee6d1df0aa5c2abfe69bd37aee53..6570b808fd0d911953df9be567c7848a805918a5 100644 (file)
@@ -7,8 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
 title: Last Level Cache Controller
 
 maintainers:
-  - Rishabh Bhatnagar <rishabhb@codeaurora.org>
-  - Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
+  - Bjorn Andersson <andersson@kernel.org>
 
 description: |
   LLCC (Last Level Cache Controller) provides last level of cache memory in SoC,