ARM: dts: Add ethernet to a bunch of platforms

These platforms have the PHY defined already so we just
need to add a single device node to each of them to activate
the ethernet device.

The PHY skew/delay settings for pin control is known from a
few vendor trees and old OpenWRT patch sets.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

diff --git a/arch/arm/boot/dts/gemini-dlink-dns-313.dts b/arch/arm/boot/dts/gemini-dlink-dns-313.dts
index 076b8d89befbbba6d6c8b3afe51113a14b66db90..08568ce24d06fc9576b57c373ab96aedc80c23b7 100644 (file)
--- a/arch/arm/boot/dts/gemini-dlink-dns-313.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dns-313.dts
@@ -214,6 +214,56 @@
                                                groups = "gpio1dgrp";
                                        };
                                };
+                               pinctrl-gmii {
+                                       mux {
+                                               function = "gmii";
+                                               groups = "gmii_gmac0_grp";
+                                       };
+                                       /*
+                                        * In the vendor Linux tree, these values are set for the C3
+                                        * version of the SL3512 ASIC with the comment "benson suggest"
+                                        */
+                                       conf0 {
+                                               pins = "R8 GMAC0 RXDV", "U11 GMAC1 RXDV";
+                                               skew-delay = <0>;
+                                       };
+                                       conf1 {
+                                               pins = "T8 GMAC0 RXC";
+                                               skew-delay = <10>;
+                                       };
+                                       conf2 {
+                                               pins = "T11 GMAC1 RXC";
+                                               skew-delay = <15>;
+                                       };
+                                       conf3 {
+                                               pins = "P8 GMAC0 TXEN", "V11 GMAC1 TXEN";
+                                               skew-delay = <7>;
+                                       };
+                                       conf4 {
+                                               pins = "V7 GMAC0 TXC", "P10 GMAC1 TXC";
+                                               skew-delay = <10>;
+                                       };
+                                       conf5 {
+                                               /* The data lines all have default skew */
+                                               pins = "U8 GMAC0 RXD0", "V8 GMAC0 RXD1",
+                                                      "P9 GMAC0 RXD2", "R9 GMAC0 RXD3",
+                                                      "R11 GMAC1 RXD0", "P11 GMAC1 RXD1",
+                                                      "V12 GMAC1 RXD2", "U12 GMAC1 RXD3",
+                                                      "R10 GMAC1 TXD0", "T10 GMAC1 TXD1",
+                                                      "U10 GMAC1 TXD2", "V10 GMAC1 TXD3";
+                                               skew-delay = <7>;
+                                       };
+                                       conf6 {
+                                               pins = "U7 GMAC0 TXD0", "T7 GMAC0 TXD1",
+                                                      "R7 GMAC0 TXD2", "P7 GMAC0 TXD3";
+                                               skew-delay = <5>;
+                                       };
+                                       /* Set up drive strength on GMAC0 to 16 mA */
+                                       conf7 {
+                                               groups = "gmii_gmac0_grp";
+                                               drive-strength = <16>;
+                                       };
+                               };
                        };
                };
 
@@ -234,6 +284,18 @@
                        pinctrl-0 = <&gpio1_default_pins>;
                };
 
+               ethernet@60000000 {
+                       status = "okay";
+
+                       ethernet-port@0 {
+                               phy-mode = "rgmii";
+                               phy-handle = <&phy0>;
+                       };
+                       ethernet-port@1 {
+                               /* Not used in this platform */
+                       };
+               };
+
                ata@63000000 {
                        status = "okay";
                };

diff --git a/arch/arm/boot/dts/gemini-nas4220b.dts b/arch/arm/boot/dts/gemini-nas4220b.dts
index 943d2d07fac7b2432d8d8aae6f766b27f77c0a44..8bbb6f85d1618b3743bed54612ffe769141c850b 100644 (file)
--- a/arch/arm/boot/dts/gemini-nas4220b.dts
+++ b/arch/arm/boot/dts/gemini-nas4220b.dts
@@ -129,6 +129,50 @@
                                                groups = "gpio1dgrp";
                                        };
                                };
+                               pinctrl-gmii {
+                                       mux {
+                                               function = "gmii";
+                                               groups = "gmii_gmac0_grp";
+                                       };
+                                       /* Settings come from OpenWRT */
+                                       conf0 {
+                                               pins = "R8 GMAC0 RXDV", "U11 GMAC1 RXDV";
+                                               skew-delay = <0>;
+                                       };
+                                       conf1 {
+                                               pins = "T8 GMAC0 RXC", "T11 GMAC1 RXC";
+                                               skew-delay = <15>;
+                                       };
+                                       conf2 {
+                                               pins = "P8 GMAC0 TXEN", "V11 GMAC1 TXEN";
+                                               skew-delay = <7>;
+                                       };
+                                       conf3 {
+                                               pins = "V7 GMAC0 TXC";
+                                               skew-delay = <11>;
+                                       };
+                                       conf4 {
+                                               pins = "P10 GMAC1 TXC";
+                                               skew-delay = <10>;
+                                       };
+                                       conf5 {
+                                               /* The data lines all have default skew */
+                                               pins = "U8 GMAC0 RXD0", "V8 GMAC0 RXD1",
+                                                      "P9 GMAC0 RXD2", "R9 GMAC0 RXD3",
+                                                      "U7 GMAC0 TXD0", "T7 GMAC0 TXD1",
+                                                      "R7 GMAC0 TXD2", "P7 GMAC0 TXD3",
+                                                      "R11 GMAC1 RXD0", "P11 GMAC1 RXD1",
+                                                      "V12 GMAC1 RXD2", "U12 GMAC1 RXD3",
+                                                      "R10 GMAC1 TXD0", "T10 GMAC1 TXD1",
+                                                      "U10 GMAC1 TXD2", "V10 GMAC1 TXD3";
+                                               skew-delay = <7>;
+                                       };
+                                       /* Set up drive strength on GMAC0 to 16 mA */
+                                       conf6 {
+                                               groups = "gmii_gmac0_grp";
+                                               drive-strength = <16>;
+                                       };
+                               };
                        };
                };
 
@@ -143,6 +187,18 @@
                        pinctrl-0 = <&gpio1_default_pins>;
                };
 
+               ethernet@60000000 {
+                       status = "okay";
+
+                       ethernet-port@0 {
+                               phy-mode = "rgmii";
+                               phy-handle = <&phy0>;
+                       };
+                       ethernet-port@1 {
+                               /* Not used in this platform */
+                       };
+               };
+
                ata@63000000 {
                        status = "okay";
                };

diff --git a/arch/arm/boot/dts/gemini-rut1xx.dts b/arch/arm/boot/dts/gemini-rut1xx.dts
index fd55528bba562d87a130e63995f2d2e5625a53b4..15f20178642cf6018cbd5b820f276e8f08c580f8 100644 (file)
--- a/arch/arm/boot/dts/gemini-rut1xx.dts
+++ b/arch/arm/boot/dts/gemini-rut1xx.dts
@@ -114,5 +114,17 @@
                        pinctrl-names = "default";
                        pinctrl-0 = <&gpio1_default_pins>;
                };
+
+               ethernet@60000000 {
+                       status = "okay";
+
+                       ethernet-port@0 {
+                               phy-mode = "rgmii";
+                               phy-handle = <&phy0>;
+                       };
+                       ethernet-port@1 {
+                               /* Not used in this platform */
+                       };
+               };
        };
 };

diff --git a/arch/arm/boot/dts/gemini-wbd111.dts b/arch/arm/boot/dts/gemini-wbd111.dts
index 389cb2b275c73d4a3be2647d7209623a2a3ffb8e..b4ec9ad85d722477df9e5d25b2930930f6d3155c 100644 (file)
--- a/arch/arm/boot/dts/gemini-wbd111.dts
+++ b/arch/arm/boot/dts/gemini-wbd111.dts
@@ -160,5 +160,17 @@
                                <0x6000 0 0 3 &pci_intc 1>,
                                <0x6000 0 0 4 &pci_intc 2>;
                };
+
+               ethernet@60000000 {
+                       status = "okay";
+
+                       ethernet-port@0 {
+                               phy-mode = "rgmii";
+                               phy-handle = <&phy0>;
+                       };
+                       ethernet-port@1 {
+                               /* Not used in this platform */
+                       };
+               };
        };
 };

diff --git a/arch/arm/boot/dts/gemini-wbd222.dts b/arch/arm/boot/dts/gemini-wbd222.dts
index 2f00e88292ac2635c8e281112349eaa250fdfe08..6d25bcc046e7494b25f76770b44ce9410cf895a5 100644 (file)
--- a/arch/arm/boot/dts/gemini-wbd222.dts
+++ b/arch/arm/boot/dts/gemini-wbd222.dts
@@ -136,6 +136,13 @@
                                                "gpio0bgrp";
                                        };
                                };
+                               pinctrl-gmii {
+                                       /* This platform use both the ethernet ports */
+                                       mux {
+                                               function = "gmii";
+                                               groups = "gmii_gmac0_grp", "gmii_gmac1_grp";
+                                       };
+                               };
                        };
                };
 
@@ -165,5 +172,18 @@
                                <0x6000 0 0 3 &pci_intc 1>,
                                <0x6000 0 0 4 &pci_intc 2>;
                };
+
+               ethernet@60000000 {
+                       status = "okay";
+
+                       ethernet-port@0 {
+                               phy-mode = "rgmii";
+                               phy-handle = <&phy0>;
+                       };
+                       ethernet-port@1 {
+                               phy-mode = "rgmii";
+                               phy-handle = <&phy1>;
+                       };
+               };
        };
 };