arm64: dts: rockchip: Use only supported PCIe link speed on rk3399
authorPeter Robinson <pbrobinson@gmail.com>
Tue, 13 Apr 2021 14:17:09 +0000 (15:17 +0100)
committerHeiko Stuebner <heiko@sntech.de>
Sun, 9 May 2021 23:52:45 +0000 (01:52 +0200)
The max link speed supported by the rk3399 is already set in the
rk3399.dtsi file so don't set unsupported link speeds in device
specific DTs. This is the same fix as 642fb27.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Link: https://lore.kernel.org/r/20210413141709.845592-1-pbrobinson@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi

index 16fd58c4a80f3ff5e30e79e391d15a670daed35a..8c0ff6c96e03789ad7a99c471e62f9a950e5fbb8 100644 (file)
 };
 
 &pcie0 {
-       max-link-speed = <2>;
        num-lanes = <2>;
        vpcie0v9-supply = <&vcca0v9_s3>;
        vpcie1v8-supply = <&vcca1v8_s3>;
index 7d0a7c6977039c03fe249f1ee7e710eb2c1886ac..b28888ea9262ee3975fca01fbb07c9671b19da88 100644 (file)
 
 &pcie0 {
        ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
-       max-link-speed = <2>;
        num-lanes = <4>;
        pinctrl-0 = <&pcie_clkreqnb_cpm>;
        pinctrl-names = "default";
index c0074b3ed4af798b246ae9394c41d7883d9ff835..01d1a75c8b4d3b7b042816bfd386b0a0edd8a613 100644 (file)
 
 &pcie0 {
        ep-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
-       max-link-speed = <2>;
        num-lanes = <4>;
        pinctrl-0 = <&pcie_clkreqnb_cpm>;
        pinctrl-names = "default";