drm/panel-samsung-s6e88a0-ams452ef01: Drop custom DSI write macro

There is a macro for this already in the <drm/drm_mipi_dsi.h> header, use
that instead and delete the custom DSI write macro defined in the driver.

Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20230107191822.3787147-9-javierm@redhat.com

diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c b/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c
index 97ff7a18545c3f6e2a78cdecc30da8c00173d010..7431cae7427e2ce8333e8de366a982937b87f79f 100644 (file)
--- a/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c
+++ b/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c
@@ -28,14 +28,6 @@ s6e88a0_ams452ef01 *to_s6e88a0_ams452ef01(struct drm_panel *panel)
        return container_of(panel, struct s6e88a0_ams452ef01, panel);
 }
 
-#define dsi_dcs_write_seq(dsi, seq...) do {                            \
-               static const u8 d[] = { seq };                          \
-               int ret;                                                \
-               ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
-               if (ret < 0)                                            \
-                       return ret;                                     \
-       } while (0)
-
 static void s6e88a0_ams452ef01_reset(struct s6e88a0_ams452ef01 *ctx)
 {
        gpiod_set_value_cansleep(ctx->reset_gpio, 1);
@@ -54,8 +46,8 @@ static int s6e88a0_ams452ef01_on(struct s6e88a0_ams452ef01 *ctx)
 
        dsi->mode_flags |= MIPI_DSI_MODE_LPM;
 
-       dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a); // enable LEVEL2 commands
-       dsi_dcs_write_seq(dsi, 0xcc, 0x4c); // set Pixel Clock Divider polarity
+       mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a); // enable LEVEL2 commands
+       mipi_dsi_dcs_write_seq(dsi, 0xcc, 0x4c); // set Pixel Clock Divider polarity
 
        ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
        if (ret < 0) {
@@ -65,23 +57,23 @@ static int s6e88a0_ams452ef01_on(struct s6e88a0_ams452ef01 *ctx)
        msleep(120);
 
        // set default brightness/gama
-       dsi_dcs_write_seq(dsi, 0xca,
-                         0x01, 0x00, 0x01, 0x00, 0x01, 0x00,   // V255 RR,GG,BB
-                         0x80, 0x80, 0x80,                     // V203 R,G,B
-                         0x80, 0x80, 0x80,                     // V151 R,G,B
-                         0x80, 0x80, 0x80,                     // V87  R,G,B
-                         0x80, 0x80, 0x80,                     // V51  R,G,B
-                         0x80, 0x80, 0x80,                     // V35  R,G,B
-                         0x80, 0x80, 0x80,                     // V23  R,G,B
-                         0x80, 0x80, 0x80,                     // V11  R,G,B
-                         0x6b, 0x68, 0x71,                     // V3   R,G,B
-                         0x00, 0x00, 0x00);                    // V1   R,G,B
+       mipi_dsi_dcs_write_seq(dsi, 0xca,
+                              0x01, 0x00, 0x01, 0x00, 0x01, 0x00,      // V255 RR,GG,BB
+                              0x80, 0x80, 0x80,                        // V203 R,G,B
+                              0x80, 0x80, 0x80,                        // V151 R,G,B
+                              0x80, 0x80, 0x80,                        // V87  R,G,B
+                              0x80, 0x80, 0x80,                        // V51  R,G,B
+                              0x80, 0x80, 0x80,                        // V35  R,G,B
+                              0x80, 0x80, 0x80,                        // V23  R,G,B
+                              0x80, 0x80, 0x80,                        // V11  R,G,B
+                              0x6b, 0x68, 0x71,                        // V3   R,G,B
+                              0x00, 0x00, 0x00);                       // V1   R,G,B
        // set default Amoled Off Ratio
-       dsi_dcs_write_seq(dsi, 0xb2, 0x40, 0x0a, 0x17, 0x00, 0x0a);
-       dsi_dcs_write_seq(dsi, 0xb6, 0x2c, 0x0b); // set default elvss voltage
-       dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
-       dsi_dcs_write_seq(dsi, 0xf7, 0x03); // gamma/aor update
-       dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5); // disable LEVEL2 commands
+       mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x40, 0x0a, 0x17, 0x00, 0x0a);
+       mipi_dsi_dcs_write_seq(dsi, 0xb6, 0x2c, 0x0b); // set default elvss voltage
+       mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
+       mipi_dsi_dcs_write_seq(dsi, 0xf7, 0x03); // gamma/aor update
+       mipi_dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5); // disable LEVEL2 commands
 
        ret = mipi_dsi_dcs_set_display_on(dsi);
        if (ret < 0) {