clk: renesas: r8a7795: Add TMU clocks
authorNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Wed, 10 Mar 2021 10:45:54 +0000 (11:45 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 12 Mar 2021 08:22:46 +0000 (09:22 +0100)
Add TMU{0,1,2,3,4} clocks.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20210310104554.3281912-1-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r8a7795-cpg-mssr.c

index 068018ae3c6e22541d74d6a342befae177d4d003..c32d2c678046939da1d002fcb8d42b58b36fb92f 100644 (file)
@@ -128,6 +128,11 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
        DEF_MOD("fdp1-2",                117,   R8A7795_CLK_S2D1), /* ES1.x */
        DEF_MOD("fdp1-1",                118,   R8A7795_CLK_S0D1),
        DEF_MOD("fdp1-0",                119,   R8A7795_CLK_S0D1),
+       DEF_MOD("tmu4",                  121,   R8A7795_CLK_S0D6),
+       DEF_MOD("tmu3",                  122,   R8A7795_CLK_S3D2),
+       DEF_MOD("tmu2",                  123,   R8A7795_CLK_S3D2),
+       DEF_MOD("tmu1",                  124,   R8A7795_CLK_S3D2),
+       DEF_MOD("tmu0",                  125,   R8A7795_CLK_CP),
        DEF_MOD("scif5",                 202,   R8A7795_CLK_S3D4),
        DEF_MOD("scif4",                 203,   R8A7795_CLK_S3D4),
        DEF_MOD("scif3",                 204,   R8A7795_CLK_S3D4),
@@ -362,6 +367,7 @@ static const unsigned int r8a7795es1_mod_nullify[] __initconst = {
 static const struct mssr_mod_reparent r8a7795es1_mod_reparent[] __initconst = {
        { MOD_CLK_ID(118), R8A7795_CLK_S2D1 },  /* FDP1-1 */
        { MOD_CLK_ID(119), R8A7795_CLK_S2D1 },  /* FDP1-0 */
+       { MOD_CLK_ID(121), R8A7795_CLK_S3D2 },  /* TMU4 */
        { MOD_CLK_ID(217), R8A7795_CLK_S3D1 },  /* SYS-DMAC2 */
        { MOD_CLK_ID(218), R8A7795_CLK_S3D1 },  /* SYS-DMAC1 */
        { MOD_CLK_ID(219), R8A7795_CLK_S3D1 },  /* SYS-DMAC0 */