arm64: dts: qcom: sa8775p: enable the inline crypto engine

Add an ICE node to sa8775p SoC description and enable it by adding a
phandle to the UFS node.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230913153529.32777-2-bartosz.golaszewski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index 9f4f58e831a4a6852788e29c0d1815170093f3a7..b6a93b11cbbd4e85339de3d3de42474940eb08fc 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -1525,6 +1525,7 @@
                                        <0 0>,
                                        <0 0>,
                                        <0 0>;
+                       qcom,ice = <&ice>;
                        status = "disabled";
                };
 
@@ -1546,6 +1547,13 @@
                        status = "disabled";
                };
 
+               ice: crypto@1d88000 {
+                       compatible = "qcom,sa8775p-inline-crypto-engine",
+                                    "qcom,inline-crypto-engine";
+                       reg = <0x0 0x01d88000 0x0 0x8000>;
+                       clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
+               };
+
                usb_0_hsphy: phy@88e4000 {
                        compatible = "qcom,sa8775p-usb-hs-phy",
                                     "qcom,usb-snps-hs-5nm-phy";