drm/i915: Use GEN3_IRQ_INIT() to init south interrupts in icp+

No reason not to use GEN3_IRQ_INIT() on icp+.

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028213323.5423-19-ville.syrjala@linux.intel.com

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 321a447c521bff5af38afd16dbe228a4b9d5c47d..2cbab31cfd006ec13b937409bb31e07d8f0c3650 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3741,14 +3741,10 @@ static void gen8_irq_postinstall(struct drm_i915_private *dev_priv)
 
 static void icp_irq_postinstall(struct drm_i915_private *dev_priv)
 {
+       struct intel_uncore *uncore = &dev_priv->uncore;
        u32 mask = SDE_GMBUS_ICP;
 
-       drm_WARN_ON(&dev_priv->drm, I915_READ(SDEIER) != 0);
-       I915_WRITE(SDEIER, 0xffffffff);
-       POSTING_READ(SDEIER);
-
-       gen3_assert_iir_is_zero(&dev_priv->uncore, SDEIIR);
-       I915_WRITE(SDEIMR, ~mask);
+       GEN3_IRQ_INIT(uncore, SDE, ~mask, 0xffffffff);
 }
 
 static void gen11_irq_postinstall(struct drm_i915_private *dev_priv)