KVM: x86: hyper-v: Honor HV_MSR_APIC_ACCESS_AVAILABLE privilege bit
authorVitaly Kuznetsov <vkuznets@redhat.com>
Fri, 21 May 2021 09:51:47 +0000 (11:51 +0200)
committerPaolo Bonzini <pbonzini@redhat.com>
Thu, 17 Jun 2021 17:09:41 +0000 (13:09 -0400)
HV_X64_MSR_EOI, HV_X64_MSR_ICR, HV_X64_MSR_TPR, and
HV_X64_MSR_VP_ASSIST_PAGE  are only available to guest when
HV_MSR_APIC_ACCESS_AVAILABLE bit is exposed.

Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20210521095204.2161214-14-vkuznets@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
arch/x86/kvm/hyperv.c

index 787fd58593dda5abfb1328388c2ee5c97354614b..a168b72334cc48c85f7bb2d05160dfce801adab5 100644 (file)
@@ -1246,6 +1246,13 @@ static bool hv_check_msr_access(struct kvm_vcpu_hv *hv_vcpu, u32 msr)
        case HV_X64_MSR_STIMER3_COUNT:
                return hv_vcpu->cpuid_cache.features_eax &
                        HV_MSR_SYNTIMER_AVAILABLE;
+       case HV_X64_MSR_EOI:
+       case HV_X64_MSR_ICR:
+       case HV_X64_MSR_TPR:
+       case HV_X64_MSR_VP_ASSIST_PAGE:
+               return hv_vcpu->cpuid_cache.features_eax &
+                       HV_MSR_APIC_ACCESS_AVAILABLE;
+               break;
        default:
                break;
        }