ARM: dts: at91: use generic name for reset controller

Use generic name for reset controller of AT91 devices to comply with
DT specifications.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220610092414.1816571-2-claudiu.beznea@microchip.com

diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 7368347c9357ad9cb98fc1b5338a6c31f30be372..9d9820db9482c59322c233a4f445784ba857aeab 100644 (file)
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -123,7 +123,7 @@
                                clock-names = "slow_xtal", "main_xtal";
                        };
 
-                       rstc@fffffd00 {
+                       reset-controller@fffffd00 {
                                compatible = "atmel,at91sam9260-rstc";
                                reg = <0xfffffd00 0x10>;
                                clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;

diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index 7adc36ca8a467572f18612f7cf4ff14321ab4735..259aca5653051f8db6d7c4b302b595b512bfd7bb 100644 (file)
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -603,7 +603,7 @@
                                clock-names = "slow_xtal", "main_xtal";
                        };
 
-                       rstc@fffffd00 {
+                       reset-controller@fffffd00 {
                                compatible = "atmel,at91sam9260-rstc";
                                reg = <0xfffffd00 0x10>;
                                clocks = <&slow_xtal>;

diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index fe45d96239c9a82786bfd1238eff9be38344ba64..c080df8c2312b9a74dd7d97df958b4e7ebd49584 100644 (file)
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -151,7 +151,7 @@
                                clock-names = "t0_clk", "slow_clk";
                        };
 
-                       rstc@fffffd00 {
+                       reset-controller@fffffd00 {
                                compatible = "atmel,at91sam9260-rstc";
                                reg = <0xfffffd00 0x10>;
                                clocks = <&slow_xtal>;

diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 2ab730fd64724ebdfe91300c866177fad1706c16..09794561c7ceb2dd6edd5f364c98eb56ff4aa78d 100644 (file)
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -137,7 +137,7 @@
                                clock-names = "slow_clk", "main_xtal";
                        };
 
-                       rstc@fffffd00 {
+                       reset-controller@fffffd00 {
                                compatible = "atmel,at91sam9g45-rstc";
                                reg = <0xfffffd00 0x10>;
                                clocks = <&clk32k>;

diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 0785389f5507755ed0b4cea963f162fb898855e3..556f35ce49e34a4c7952a09e96d3a08909bf2145 100644 (file)
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -126,7 +126,7 @@
                                interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
                        };
 
-                       rstc@fffffe00 {
+                       reset-controller@fffffe00 {
                                compatible = "atmel,at91sam9g45-rstc";
                                reg = <0xfffffe00 0x10>;
                                clocks = <&clk32k>;

diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi
index 730d1182c73e07e8037356cb67a67af0110756e4..12c634811820120f27f0f948de36afdfee972b9c 100644 (file)
--- a/arch/arm/boot/dts/at91sam9rl.dtsi
+++ b/arch/arm/boot/dts/at91sam9rl.dtsi
@@ -766,7 +766,7 @@
                                clock-names = "slow_clk", "main_xtal";
                        };
 
-                       rstc@fffffd00 {
+                       reset-controller@fffffd00 {
                                compatible = "atmel,at91sam9260-rstc";
                                reg = <0xfffffd00 0x10>;
                                clocks = <&clk32k>;

diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 395e883644cd86a18d154cd6bcae2ec96cedb0c6..ea3b11336c794f10703cfd15080555245a7a761f 100644 (file)
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -134,7 +134,7 @@
                                clock-names = "slow_clk", "main_xtal";
                        };
 
-                       reset_controller: rstc@fffffe00 {
+                       reset_controller: reset-controller@fffffe00 {
                                compatible = "atmel,at91sam9g45-rstc";
                                reg = <0xfffffe00 0x10>;
                                clocks = <&clk32k>;

diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi
index c328b67bea0ca37b95f646614ef55519552b0f33..6b1d4492444a8fa24ce8fba2345dbc9d830e27ac 100644 (file)
--- a/arch/arm/boot/dts/sam9x60.dtsi
+++ b/arch/arm/boot/dts/sam9x60.dtsi
@@ -667,7 +667,7 @@
                                clock-names = "td_slck", "md_slck", "main_xtal";
                        };
 
-                       reset_controller: rstc@fffffe00 {
+                       reset_controller: reset-controller@fffffe00 {
                                compatible = "microchip,sam9x60-rstc";
                                reg = <0xfffffe00 0x10>;
                                clocks = <&clk32k 0>;

diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 5b2f2e922d405c88cc6f25b305b02ff37cea250c..0baa18655830c1b213d3d572efe97f6939e50cf1 100644 (file)
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -668,7 +668,7 @@
                                ranges = <0 0xf8044000 0x1420>;
                        };
 
-                       reset_controller: rstc@f8048000 {
+                       reset_controller: reset-controller@f8048000 {
                                compatible = "atmel,sama5d3-rstc";
                                reg = <0xf8048000 0x10>;
                                clocks = <&clk32k>;

diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 8fa423c52592d246df438faad08af525558fe5fd..2d0935ad2225d6c3500e9c7034982150f2ff1071 100644 (file)
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -1003,7 +1003,7 @@
                                clock-names = "slow_clk", "main_xtal";
                        };
 
-                       reset_controller: rstc@fffffe00 {
+                       reset_controller: reset-controller@fffffe00 {
                                compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
                                reg = <0xfffffe00 0x10>;
                                clocks = <&clk32k>;

diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index 7b9242664875c05170091c838c7bd28598d9eab2..1e5c01898ccff3d5eb6e54a173de7c19be56c3cc 100644 (file)
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -726,7 +726,7 @@
                                };
                        };
 
-                       reset_controller: rstc@fc068600 {
+                       reset_controller: reset-controller@fc068600 {
                                compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
                                reg = <0xfc068600 0x10>;
                                clocks = <&clk32k>;