Increase TCL data ring size to 2048 for WCN6750. This is
needed to meet 160 MHz TX throughput.
Add a new hw_param to indicate the TX ring size for
individual devices.
Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
Link: https://lore.kernel.org/r/20220905071805.31625-4-quic_mpubbise@quicinc.com
.sram_dump = {},
.tcl_ring_retry = true,
+ .tx_ring_size = DP_TCL_DATA_RING_SIZE,
},
{
.hw_rev = ATH11K_HW_IPQ6018_HW10,
.sram_dump = {},
.tcl_ring_retry = true,
+ .tx_ring_size = DP_TCL_DATA_RING_SIZE,
},
{
.name = "qca6390 hw2.0",
},
.tcl_ring_retry = true,
+ .tx_ring_size = DP_TCL_DATA_RING_SIZE,
},
{
.name = "qcn9074 hw1.0",
.sram_dump = {},
.tcl_ring_retry = true,
+ .tx_ring_size = DP_TCL_DATA_RING_SIZE,
},
{
.name = "wcn6855 hw2.0",
},
.tcl_ring_retry = true,
+ .tx_ring_size = DP_TCL_DATA_RING_SIZE,
},
{
.name = "wcn6855 hw2.1",
},
.tcl_ring_retry = true,
+ .tx_ring_size = DP_TCL_DATA_RING_SIZE,
},
{
.name = "wcn6750 hw1.0",
.sram_dump = {},
.tcl_ring_retry = false,
+ .tx_ring_size = DP_TCL_DATA_RING_SIZE_WCN6750,
},
};
ret = ath11k_dp_srng_setup(ab, &dp->tx_ring[i].tcl_data_ring,
HAL_TCL_DATA, tcl_num, 0,
- DP_TCL_DATA_RING_SIZE);
+ ab->hw_params.tx_ring_size);
if (ret) {
ath11k_warn(ab, "failed to set up tcl_data ring (%d) :%d\n",
i, ret);
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef ATH11K_DP_H
#define DP_WBM_RELEASE_RING_SIZE 64
#define DP_TCL_DATA_RING_SIZE 512
+#define DP_TCL_DATA_RING_SIZE_WCN6750 2048
#define DP_TX_COMP_RING_SIZE 32768
#define DP_TX_IDR_SIZE DP_TX_COMP_RING_SIZE
#define DP_TCL_CMD_RING_SIZE 32
} sram_dump;
bool tcl_ring_retry;
+ u32 tx_ring_size;
};
struct ath11k_hw_ops {