--- /dev/null
+DataImage, Inc. 7" WVGA (800x480) TFT LCD panel with 24-bit parallel interface.
+
+Required properties:
+- compatible: should be "dataimage,scf0700c48ggu18"
+- power-supply: as specified in the base binding
+
+This binding is compatible with the simple-panel binding, which is specified
+in simple-panel.txt in this directory.
 
        },
 };
 
+static const struct drm_display_mode dataimage_scf0700c48ggu18_mode = {
+       .clock = 33260,
+       .hdisplay = 800,
+       .hsync_start = 800 + 40,
+       .hsync_end = 800 + 40 + 128,
+       .htotal = 800 + 40 + 128 + 88,
+       .vdisplay = 480,
+       .vsync_start = 480 + 10,
+       .vsync_end = 480 + 10 + 2,
+       .vtotal = 480 + 10 + 2 + 33,
+       .vrefresh = 60,
+       .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
+};
+
+static const struct panel_desc dataimage_scf0700c48ggu18 = {
+       .modes = &dataimage_scf0700c48ggu18_mode,
+       .num_modes = 1,
+       .bpc = 8,
+       .size = {
+               .width = 152,
+               .height = 91,
+       },
+       .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
+       .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_POSEDGE,
+};
+
 static const struct display_timing dlc_dlc0700yzg_1_timing = {
        .pixelclock = { 45000000, 51200000, 57000000 },
        .hactive = { 1024, 1024, 1024 },
        }, {
                .compatible = "chunghwa,claa101wb01",
                .data = &chunghwa_claa101wb01
+       }, {
+               .compatible = "dataimage,scf0700c48ggu18",
+               .data = &dataimage_scf0700c48ggu18,
        }, {
                .compatible = "dlc,dlc0700yzg-1",
                .data = &dlc_dlc0700yzg_1,