uint16_t cursy;
} TCXState;
-static void tcx_set_dirty(TCXState *s)
+static void tcx_set_dirty(TCXState *s, ram_addr_t addr, int len)
{
- memory_region_set_dirty(&s->vram_mem, 0, MAXX * MAXY);
+ memory_region_set_dirty(&s->vram_mem, addr, len);
}
static inline int tcx24_check_dirty(TCXState *s, ram_addr_t page,
break;
}
}
- tcx_set_dirty(s);
+ tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem));
}
static void tcx_draw_line32(TCXState *s1, uint8_t *d,
{
TCXState *s = opaque;
- tcx_set_dirty(s);
+ tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem));
qemu_console_resize(s->con, s->width, s->height);
}
{
TCXState *s = opaque;
- tcx_set_dirty(s);
+ tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem));
qemu_console_resize(s->con, s->width, s->height);
}
TCXState *s = opaque;
update_palette_entries(s, 0, 256);
- tcx_set_dirty(s);
+ tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem));
return 0;
}