/* GP timers */
struct omap_gp_timer_s {
+ MemoryRegion iomem;
qemu_irq irq;
qemu_irq wkup;
qemu_irq in;
}
}
-static CPUReadMemoryFunc * const omap_gp_timer_readfn[] = {
- omap_badwidth_read32,
- omap_gp_timer_readh,
- omap_gp_timer_readw,
-};
-
static void omap_gp_timer_write(void *opaque, target_phys_addr_t addr,
uint32_t value)
{
s->writeh = (uint16_t) value;
}
-static CPUWriteMemoryFunc * const omap_gp_timer_writefn[] = {
- omap_badwidth_write32,
- omap_gp_timer_writeh,
- omap_gp_timer_write,
+static const MemoryRegionOps omap_gp_timer_ops = {
+ .old_mmio = {
+ .read = {
+ omap_badwidth_read32,
+ omap_gp_timer_readh,
+ omap_gp_timer_readw,
+ },
+ .write = {
+ omap_badwidth_write32,
+ omap_gp_timer_writeh,
+ omap_gp_timer_write,
+ },
+ },
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
struct omap_gp_timer_s *omap_gp_timer_init(struct omap_target_agent_s *ta,
qemu_irq irq, omap_clk fclk, omap_clk iclk)
{
- int iomemtype;
struct omap_gp_timer_s *s = (struct omap_gp_timer_s *)
g_malloc0(sizeof(struct omap_gp_timer_s));
omap_gp_timer_reset(s);
omap_gp_timer_clk_setup(s);
- iomemtype = cpu_register_io_memory(omap_gp_timer_readfn,
- omap_gp_timer_writefn, s, DEVICE_NATIVE_ENDIAN);
- omap_l4_attach(ta, 0, iomemtype);
+ memory_region_init_io(&s->iomem, &omap_gp_timer_ops, s, "omap.gptimer",
+ omap_l4_region_size(ta, 0));
+ omap_l4_attach_region(ta, 0, &s->iomem);
return s;
}