/* Invalidate ELD */
tmp = intel_de_read(i915, G4X_AUD_CNTL_ST);
- tmp &= ~G4X_ELDV;
+ tmp &= ~G4X_ELD_VALID;
intel_de_write(i915, G4X_AUD_CNTL_ST, tmp);
}
int len, i;
if (intel_eld_uptodate(connector,
- G4X_AUD_CNTL_ST, G4X_ELDV,
- G4X_AUD_CNTL_ST, G4X_ELD_ADDR_MASK,
+ G4X_AUD_CNTL_ST, G4X_ELD_VALID,
+ G4X_AUD_CNTL_ST, G4X_ELD_ADDRESS_MASK,
G4X_HDMIW_HDMIEDID))
return;
tmp = intel_de_read(i915, G4X_AUD_CNTL_ST);
- tmp &= ~(G4X_ELDV | G4X_ELD_ADDR_MASK);
+ tmp &= ~(G4X_ELD_VALID | G4X_ELD_ADDRESS_MASK);
len = REG_FIELD_GET(G4X_ELD_BUFFER_SIZE_MASK, tmp);
intel_de_write(i915, G4X_AUD_CNTL_ST, tmp);
*((const u32 *)eld + i));
tmp = intel_de_read(i915, G4X_AUD_CNTL_ST);
- tmp |= G4X_ELDV;
+ tmp |= G4X_ELD_VALID;
intel_de_write(i915, G4X_AUD_CNTL_ST, tmp);
}
#include "i915_reg_defs.h"
#define G4X_AUD_CNTL_ST _MMIO(0x620B4)
-#define G4X_ELDV REG_BIT(14)
+#define G4X_ELD_VALID REG_BIT(14)
#define G4X_ELD_BUFFER_SIZE_MASK REG_GENMASK(13, 9)
-#define G4X_ELD_ADDR_MASK REG_GENMASK(8, 5)
+#define G4X_ELD_ADDRESS_MASK REG_GENMASK(8, 5)
#define G4X_ELD_ACK REG_BIT(4)
#define G4X_HDMIW_HDMIEDID _MMIO(0x6210C)