metag: Fix typos

Fix typos in metag architecture.

[james.hogan@imgtec.com: squashed patches and fixed "detailed"]

Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net>
Signed-off-by: James Hogan <james.hogan@imgtec.com>

diff --git a/arch/metag/include/asm/metag_mem.h b/arch/metag/include/asm/metag_mem.h
index aa5a076df439a9490f941cd335c7af8c90b62b0c..7848bc6d3b61466ff48264dced902e4393a2dbec 100644 (file)
--- a/arch/metag/include/asm/metag_mem.h
+++ b/arch/metag/include/asm/metag_mem.h
@@ -881,7 +881,7 @@
 #define    PERFCTRL_DCSTALL 11 /* Dcache+TLB o/p delayed (per-thread) */
 #define    PERFCTRL_ICSTALL 12 /* Icache+TLB o/p delayed (per-thread) */
 
-#define    PERFCTRL_INT     13 /* Internal core delailed events (see next) */
+#define    PERFCTRL_INT     13 /* Internal core detailed events (see next) */
 #define    PERFCTRL_EXT     15 /* External source in core periphery */
 #endif /* METAC_2_1 */
 

diff --git a/arch/metag/include/asm/metag_regs.h b/arch/metag/include/asm/metag_regs.h
index 40c3f679c5b8640e60c69149f01567bf19256a26..60b750971d8a12c2a4b1d38463b01034817a4c75 100644 (file)
--- a/arch/metag/include/asm/metag_regs.h
+++ b/arch/metag/include/asm/metag_regs.h
@@ -179,7 +179,7 @@
 ;   is best to dump these registers immediately at the start of a routine
 ;   using a MSETL or SETL instruction-
 ;
-;   MSETL   [A0StP],D0Ar6,D0Ar4,D0Ar2; Only dump argments expected
+;   MSETL   [A0StP],D0Ar6,D0Ar4,D0Ar2; Only dump arguments expected
 ;or SETL    [A0StP+#8++],D0Ar2       ; Up to two 32-bit args expected
 ;
 ; For non-leaf routines it is always necessary to save and restore at least

diff --git a/arch/metag/kernel/cachepart.c b/arch/metag/kernel/cachepart.c
index 04b7d4f8429ac399ba74c34a39722311f052da3b..db944c2e7d889a1c32d55a750e78a2db6dce6905 100644 (file)
--- a/arch/metag/kernel/cachepart.c
+++ b/arch/metag/kernel/cachepart.c
@@ -15,7 +15,7 @@
 #define SYSC_DCPART(n) (SYSC_DCPART0 + SYSC_xCPARTn_STRIDE * (n))
 #define SYSC_ICPART(n) (SYSC_ICPART0 + SYSC_xCPARTn_STRIDE * (n))
 
-#define CACHE_ASSOCIATIVITY 4 /* 4 way set-assosiative */
+#define CACHE_ASSOCIATIVITY 4 /* 4 way set-associative */
 #define ICACHE 0
 #define DCACHE 1
 

diff --git a/arch/metag/lib/divsi3.S b/arch/metag/lib/divsi3.S
index 7c8a8ae9a0a109dc377bdfb6640f651c70013136..11124cc93dee8759bf8eabd51afd53e83418d105 100644 (file)
--- a/arch/metag/lib/divsi3.S
+++ b/arch/metag/lib/divsi3.S
@@ -50,7 +50,7 @@ $LIDMCQuick:
        ADDCC   D0Re0,D0Re0,#1          ! If yes result += 1
        SUBCC   D1Ar1,D1Ar1,D1Re0       !        and A -= Bu
        ORS     D0Ar4,D0Ar4,D0Ar4       ! Return neg result?
-       NEG     D0Ar2,D0Re0             ! Calulate neg result
+       NEG     D0Ar2,D0Re0             ! Calculate neg result
        MOVMI   D0Re0,D0Ar2             ! Yes: Take neg result
 $LIDMCRet:
        MOV     PC,D1RtP
@@ -94,7 +94,7 @@ $LIDMCLoop:
        LSR     D1Re0, D1Re0, #1        ! Shift down B
        BNZ     $LIDMCLoop               ! Was single bit in curbit lost?
        ORS     D0Ar4,D0Ar4,D0Ar4       ! Return neg result?
-       NEG     D0Ar2,D0Re0             ! Calulate neg result
+       NEG     D0Ar2,D0Re0             ! Calculate neg result
        MOVMI   D0Re0,D0Ar2             ! Yes: Take neg result
        MOV     PC,D1RtP
        .size   ___divsi3,.-___divsi3