arm64: dts: exynos: use lowercase hex addresses

By convention the hex addresses should be lowercase.

Link: https://lore.kernel.org/r/20230125094513.155063-9-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 47b5ac06f0d663cce04f683d9ce01ec23dbc1d69..9da24fe958a31a9cfd6793040e9e9064fa85845a 100644 (file)
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -351,7 +351,7 @@
                compatible = "arm,psci";
                method = "smc";
                cpu_off = <0x84000002>;
-               cpu_on = <0xC4000003>;
+               cpu_on = <0xc4000003>;
        };
 
        soc: soc@0 {
@@ -1020,7 +1020,7 @@
 
                dsi: dsi@13900000 {
                        compatible = "samsung,exynos5433-mipi-dsi";
-                       reg = <0x13900000 0xC0>;
+                       reg = <0x13900000 0xc0>;
                        interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
                        phys = <&mipi_phy 1>;
                        phy-names = "dsim";
@@ -1272,7 +1272,7 @@
 
                mfc: codec@152e0000 {
                        compatible = "samsung,exynos5433-mfc";
-                       reg = <0x152E0000 0x10000>;
+                       reg = <0x152e0000 0x10000>;
                        interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "pclk", "aclk", "aclk_xiu";
                        clocks = <&cmu_mfc CLK_PCLK_MFC>,
@@ -1329,7 +1329,7 @@
 
                sysmmu_gscl0: sysmmu@13c80000 {
                        compatible = "samsung,exynos-sysmmu";
-                       reg = <0x13C80000 0x1000>;
+                       reg = <0x13c80000 0x1000>;
                        interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "aclk", "pclk";
                        clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL0>,
@@ -1340,7 +1340,7 @@
 
                sysmmu_gscl1: sysmmu@13c90000 {
                        compatible = "samsung,exynos-sysmmu";
-                       reg = <0x13C90000 0x1000>;
+                       reg = <0x13c90000 0x1000>;
                        interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "aclk", "pclk";
                        clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL1>,
@@ -1351,7 +1351,7 @@
 
                sysmmu_gscl2: sysmmu@13ca0000 {
                        compatible = "samsung,exynos-sysmmu";
-                       reg = <0x13CA0000 0x1000>;
+                       reg = <0x13ca0000 0x1000>;
                        interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "aclk", "pclk";
                        clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL2>,

diff --git a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
index abb3bd700d6f7a49a2383f51160fa7e1ced8e813..f3f4a6ab4b495f6f25f846ce7c54fb2d36a25032 100644 (file)
--- a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
+++ b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
@@ -28,7 +28,7 @@
 
        memory@40000000 {
                device_type = "memory";
-               reg = <0x0 0x40000000 0x0 0xC0000000>;
+               reg = <0x0 0x40000000 0x0 0xc0000000>;
        };
 
        usb30_vbus_reg: regulator-usb30 {

diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
index f378d8629d88c79e2b6b148e74e369478ea38dc5..82fee1b7caab296817f2c950d2282fffe71ef2d6 100644 (file)
--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -119,7 +119,7 @@
                compatible = "arm,psci";
                method = "smc";
                cpu_off = <0x84000002>;
-               cpu_on = <0xC4000003>;
+               cpu_on = <0xc4000003>;
        };
 
        soc: soc@0 {
@@ -146,7 +146,7 @@
 
                pdma0: dma-controller@10e10000 {
                        compatible = "arm,pl330", "arm,primecell";
-                       reg = <0x10E10000 0x1000>;
+                       reg = <0x10e10000 0x1000>;
                        interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clock_fsys0 ACLK_PDMA0>;
                        clock-names = "apb_pclk";
@@ -155,7 +155,7 @@
 
                pdma1: dma-controller@10eb0000 {
                        compatible = "arm,pl330", "arm,primecell";
-                       reg = <0x10EB0000 0x1000>;
+                       reg = <0x10eb0000 0x1000>;
                        interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clock_fsys0 ACLK_PDMA1>;
                        clock-names = "apb_pclk";