drm/amdgpu: enable pp_od_clk_voltage for gfx 9.4.3 SRIOV
authorYang Wang <kevinyang.wang@amd.com>
Wed, 28 Feb 2024 03:10:54 +0000 (11:10 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 28 Feb 2024 22:09:42 +0000 (17:09 -0500)
v1:
enabel pp_od_clk_voltage node for gfx 9.4.3 SRIOV and BM.

v2:
add onevf check for gfx 9.4.3

v3:
refine code check order to make function clearly.

Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/pm/amdgpu_pm.c

index 1ff7fc821871bc4fc3d40459a5cef16ca2833c7c..9e70c41ad98f14d8b10397d7e102235af2ca7ad1 100644 (file)
@@ -2034,6 +2034,31 @@ static int ss_bias_attr_update(struct amdgpu_device *adev, struct amdgpu_device_
        return 0;
 }
 
+static int pp_od_clk_voltage_attr_update(struct amdgpu_device *adev, struct amdgpu_device_attr *attr,
+                                        uint32_t mask, enum amdgpu_device_attr_states *states)
+{
+       uint32_t gc_ver = amdgpu_ip_version(adev, GC_HWIP, 0);
+
+       *states = ATTR_STATE_SUPPORTED;
+
+       if (!amdgpu_dpm_is_overdrive_supported(adev)) {
+               *states = ATTR_STATE_UNSUPPORTED;
+               return 0;
+       }
+
+       /* Enable pp_od_clk_voltage node for gc 9.4.3 SRIOV/BM support */
+       if (gc_ver == IP_VERSION(9, 4, 3)) {
+               if (amdgpu_sriov_vf(adev) && !amdgpu_sriov_is_pp_one_vf(adev))
+                       *states = ATTR_STATE_UNSUPPORTED;
+               return 0;
+       }
+
+       if (!(attr->flags & mask))
+               *states = ATTR_STATE_UNSUPPORTED;
+
+       return 0;
+}
+
 /* Following items will be read out to indicate current plpd policy:
  *  - -1: none
  *  - 0: disallow
@@ -2118,7 +2143,8 @@ static struct amdgpu_device_attr amdgpu_device_attrs[] = {
        AMDGPU_DEVICE_ATTR_RW(pp_sclk_od,                               ATTR_FLAG_BASIC),
        AMDGPU_DEVICE_ATTR_RW(pp_mclk_od,                               ATTR_FLAG_BASIC),
        AMDGPU_DEVICE_ATTR_RW(pp_power_profile_mode,                    ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
-       AMDGPU_DEVICE_ATTR_RW(pp_od_clk_voltage,                        ATTR_FLAG_BASIC),
+       AMDGPU_DEVICE_ATTR_RW(pp_od_clk_voltage,                        ATTR_FLAG_BASIC,
+                             .attr_update = pp_od_clk_voltage_attr_update),
        AMDGPU_DEVICE_ATTR_RO(gpu_busy_percent,                         ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
        AMDGPU_DEVICE_ATTR_RO(mem_busy_percent,                         ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
        AMDGPU_DEVICE_ATTR_RO(pcie_bw,                                  ATTR_FLAG_BASIC),
@@ -2163,10 +2189,6 @@ static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_
        } else if (DEVICE_ATTR_IS(pp_dpm_fclk)) {
                if (mp1_ver < IP_VERSION(10, 0, 0))
                        *states = ATTR_STATE_UNSUPPORTED;
-       } else if (DEVICE_ATTR_IS(pp_od_clk_voltage)) {
-               *states = ATTR_STATE_UNSUPPORTED;
-               if (amdgpu_dpm_is_overdrive_supported(adev))
-                       *states = ATTR_STATE_SUPPORTED;
        } else if (DEVICE_ATTR_IS(mem_busy_percent)) {
                if ((adev->flags & AMD_IS_APU &&
                     gc_ver != IP_VERSION(9, 4, 3)) ||