arm64: dts: qcom: msm8916: Enable CoreSight STM component
authorGeorgi Djakov <georgi.djakov@linaro.org>
Sun, 21 Mar 2021 12:42:12 +0000 (20:42 +0800)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Thu, 5 Aug 2021 15:27:34 +0000 (10:27 -0500)
Add DT binding for CoreSight System Trace Macrocell (STM) on msm8916,
which can benefit the CoreSight development on DB410c.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Acked-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20210321124212.4253-1-leo.yan@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
arch/arm64/boot/dts/qcom/msm8916.dtsi

index 6aef0c2e4f0ab1a6609a8cee97f32f6f17773f81..f8d8f3e3664ec6fac8821dee3cd5c992c2c14825 100644 (file)
 &funnel0 { status = "okay"; };
 &funnel1 { status = "okay"; };
 &replicator { status = "okay"; };
+&stm { status = "okay"; };
 &tpiu { status = "okay"; };
 
 &smd_rpm_regulators {
index 4f06c0a9c425204485351719779c8c91968d9a73..3f85e34a8ce6fa6a80471d101a563aebbd398d58 100644 (file)
                                 <&rpmcc RPM_SMD_SNOC_A_CLK>;
                };
 
+               stm: stm@802000 {
+                       compatible = "arm,coresight-stm", "arm,primecell";
+                       reg = <0x00802000 0x1000>,
+                             <0x09280000 0x180000>;
+                       reg-names = "stm-base", "stm-stimulus-base";
+
+                       clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+                       clock-names = "apb_pclk", "atclk";
+
+                       status = "disabled";
+
+                       out-ports {
+                               port {
+                                       stm_out: endpoint {
+                                               remote-endpoint = <&funnel0_in7>;
+                                       };
+                               };
+                       };
+               };
+
                /* System CTIs */
                /* CTI 0 - TMC connections */
                cti0: cti@810000 {
                                                remote-endpoint = <&funnel1_out>;
                                        };
                                };
+
+                               port@7 {
+                                       reg = <7>;
+                                       funnel0_in7: endpoint {
+                                               remote-endpoint = <&stm_out>;
+                                       };
+                               };
                        };
 
                        out-ports {