soc {
compatible = "ti,omap-infra";
- mpu {
- compatible = "ti,omap4-mpu";
- ti,hwmods = "mpu";
- pm-sram = <&pm_sram_code
- &pm_sram_data>;
- };
};
gic: interrupt-controller@48241000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
+ ranges = <0x00000000 0x00200000 0x010000>;
+
+ target-module@0 {
+ compatible = "ti,sysc-omap4-simple", "ti,sysc";
+ power-domains = <&prm_mpu>;
+ clocks = <&mpu_clkctrl AM4_MPU_MPU_CLKCTRL 0>;
+ clock-names = "fck";
+ ti,no-idle;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0x10000>;
+
+ mpu@0 {
+ compatible = "ti,omap4-mpu";
+ pm-sram = <&pm_sram_code
+ &pm_sram_data>;
+ };
+ };
};
segment@300000 { /* 0x48300000 */
#ifndef __ARCH_ARM_MACH_OMAP2_OMAP_HWMOD_33XX_43XX_COMMON_DATA_H
#define __ARCH_ARM_MACH_OMAP2_OMAP_HWMOD_33XX_43XX_COMMON_DATA_H
-extern struct omap_hwmod_ocp_if am33xx_mpu__l3_main;
extern struct omap_hwmod_ocp_if am33xx_l3_main__l3_s;
extern struct omap_hwmod_ocp_if am33xx_l3_s__l4_ls;
extern struct omap_hwmod_ocp_if am33xx_l3_s__l4_wkup;
extern struct omap_hwmod_ocp_if am33xx_l3_main__l3_instr;
-extern struct omap_hwmod_ocp_if am33xx_mpu__prcm;
extern struct omap_hwmod_ocp_if am33xx_l3_s__l3_main;
extern struct omap_hwmod_ocp_if am33xx_gfx__l3_main;
extern struct omap_hwmod_ocp_if am33xx_l3_main__gfx;
extern struct omap_hwmod am33xx_l3_instr_hwmod;
extern struct omap_hwmod am33xx_l4_ls_hwmod;
extern struct omap_hwmod am33xx_l4_wkup_hwmod;
-extern struct omap_hwmod am33xx_mpu_hwmod;
extern struct omap_hwmod am33xx_gfx_hwmod;
extern struct omap_hwmod am33xx_prcm_hwmod;
extern struct omap_hwmod am33xx_ocmcram_hwmod;
#include "omap_hwmod.h"
#include "omap_hwmod_33xx_43xx_common_data.h"
-/* mpu -> l3 main */
-struct omap_hwmod_ocp_if am33xx_mpu__l3_main = {
- .master = &am33xx_mpu_hwmod,
- .slave = &am33xx_l3_main_hwmod,
- .clk = "dpll_mpu_m2_ck",
- .user = OCP_USER_MPU,
-};
-
/* l3 main -> l3 s */
struct omap_hwmod_ocp_if am33xx_l3_main__l3_s = {
.master = &am33xx_l3_main_hwmod,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-/* mpu -> prcm */
-struct omap_hwmod_ocp_if am33xx_mpu__prcm = {
- .master = &am33xx_mpu_hwmod,
- .slave = &am33xx_prcm_hwmod,
- .clk = "dpll_mpu_m2_ck",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
/* l3 s -> l3 main*/
struct omap_hwmod_ocp_if am33xx_l3_s__l3_main = {
.master = &am33xx_l3_s_hwmod,
},
};
-/*
- * 'mpu' class
- */
-static struct omap_hwmod_class am33xx_mpu_hwmod_class = {
- .name = "mpu",
-};
-
-struct omap_hwmod am33xx_mpu_hwmod = {
- .name = "mpu",
- .class = &am33xx_mpu_hwmod_class,
- .clkdm_name = "mpu_clkdm",
- .flags = HWMOD_INIT_NO_IDLE,
- .main_clk = "dpll_mpu_m2_ck",
- .prcm = {
- .omap4 = {
- .modulemode = MODULEMODE_SWCTRL,
- },
- },
-};
-
/*
* 'prcm' class
* power and reset manager (whole prcm infrastructure)
CLKCTRL(am33xx_l4_ls_hwmod, AM43XX_CM_PER_L4LS_CLKCTRL_OFFSET);
CLKCTRL(am33xx_l4_wkup_hwmod, AM43XX_CM_WKUP_L4WKUP_CLKCTRL_OFFSET);
CLKCTRL(am33xx_l3_main_hwmod, AM43XX_CM_PER_L3_CLKCTRL_OFFSET);
- CLKCTRL(am33xx_mpu_hwmod , AM43XX_CM_MPU_MPU_CLKCTRL_OFFSET);
}
void omap_hwmod_am43xx_reg(void)
};
static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
- &am33xx_mpu__l3_main,
- &am33xx_mpu__prcm,
&am33xx_l3_s__l4_ls,
&am33xx_l3_s__l4_wkup,
&am43xx_l3_main__l4_hs,