clk: tegra: Remove last remains of TEGRA210_CLK_SOR1_SRC
authorThierry Reding <treding@nvidia.com>
Fri, 28 Jun 2019 09:06:35 +0000 (11:06 +0200)
committerThierry Reding <treding@nvidia.com>
Mon, 11 Nov 2019 13:52:08 +0000 (14:52 +0100)
Later SoC generations implement this clock as SOR1_OUT. For consistency,
the Tegra210 implementation was adapted to match the same name in commit
4d1dc4018573 ("dt-bindings: clock: tegra: Add sor1_out clock").

Clean up the remaining pieces by adopting the new name for the internal
identifiers and remove the old alias. Note that since both SOR1_SRC and
SOR1_OUT were referring to the same device tree clock ID, this does not
break device tree ABI.

Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/clk/tegra/clk-id.h
drivers/clk/tegra/clk-tegra210.c
include/dt-bindings/clock/tegra210-car.h

index de466b4446da9b616366690cd82311130dceaf2a..ae02885c9475c8dd3b2a57dc3d5a84812c3773d1 100644 (file)
@@ -238,7 +238,7 @@ enum clk_id {
        tegra_clk_sor0,
        tegra_clk_sor0_lvds,
        tegra_clk_sor1,
-       tegra_clk_sor1_src,
+       tegra_clk_sor1_out,
        tegra_clk_spdif,
        tegra_clk_spdif_2x,
        tegra_clk_spdif_in,
index df172d5772d7164dffb256e052c88f1c74cb7334..019287df6c122d490649476577fc64687a65fb71 100644 (file)
@@ -2353,7 +2353,7 @@ static struct tegra_clk tegra210_clks[tegra_clk_max] __initdata = {
        [tegra_clk_sor0] = { .dt_id = TEGRA210_CLK_SOR0, .present = true },
        [tegra_clk_sor0_lvds] = { .dt_id = TEGRA210_CLK_SOR0_LVDS, .present = true },
        [tegra_clk_sor1] = { .dt_id = TEGRA210_CLK_SOR1, .present = true },
-       [tegra_clk_sor1_src] = { .dt_id = TEGRA210_CLK_SOR1_SRC, .present = true },
+       [tegra_clk_sor1_out] = { .dt_id = TEGRA210_CLK_SOR1_OUT, .present = true },
        [tegra_clk_gpu] = { .dt_id = TEGRA210_CLK_GPU, .present = true },
        [tegra_clk_pll_g_ref] = { .dt_id = TEGRA210_CLK_PLL_G_REF, .present = true, },
        [tegra_clk_uartb_8] = { .dt_id = TEGRA210_CLK_UARTB, .present = true },
index 0bfbfc912c682b0c65b590feb3d38577e55fa070..80590c2a117e27ca8e99fd1c8dc744dc9128d0d9 100644 (file)
 #define TEGRA210_CLK_CLK_OUT_3 279
 #define TEGRA210_CLK_BLINK 280
 /* 281 */
-#define TEGRA210_CLK_SOR1_SRC 282
 #define TEGRA210_CLK_SOR1_OUT 282
 /* 283 */
 #define TEGRA210_CLK_XUSB_HOST_SRC 284