int irq;
};
-static u32 dsi_get_bpp(const enum mipi_dsi_pixel_format fmt)
-{
- switch (fmt) {
- case MIPI_DSI_FMT_RGB565: return 16;
- case MIPI_DSI_FMT_RGB666_PACKED: return 18;
- case MIPI_DSI_FMT_RGB666:
- case MIPI_DSI_FMT_RGB888:
- default: return 24;
- }
-}
static inline u32 dsi_read(struct msm_dsi_host *msm_host, u32 reg)
{
{
struct msm_dsi_host *msm_host = to_msm_dsi_host(host);
u8 lanes = msm_host->lanes;
- u32 bpp = dsi_get_bpp(msm_host->format);
+ u32 bpp = mipi_dsi_pixel_format_to_bpp(msm_host->format);
unsigned long pclk_rate = dsi_get_pclk_rate(mode, msm_host->dsc, is_bonded_dsi);
unsigned long pclk_bpp;
int dsi_calc_clk_rate_v2(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
{
- u32 bpp = dsi_get_bpp(msm_host->format);
+ u32 bpp = mipi_dsi_pixel_format_to_bpp(msm_host->format);
unsigned int esc_mhz, esc_div;
unsigned long byte_mhz;
/* image data and 1 byte write_memory_start cmd */
if (!msm_host->dsc)
- wc = hdisplay * dsi_get_bpp(msm_host->format) / 8 + 1;
+ wc = hdisplay * mipi_dsi_pixel_format_to_bpp(msm_host->format) / 8 + 1;
else
/*
* When DSC is enabled, WC = slice_chunk_size * slice_per_pkt + 1.
{
int len, ret;
int bllp_len = msm_host->mode->hdisplay *
- dsi_get_bpp(msm_host->format) / 8;
+ mipi_dsi_pixel_format_to_bpp(msm_host->format) / 8;
len = dsi_cmd_dma_add(msm_host, msg);
if (len < 0) {