arm64: dts: qcom: sdm845: Define iommus for USB controllers

The USB controllers need to be associated with their respective IOMMU
bank, so define this on the dwc3 nodes.

Also add dma-ranges to the qcom-dwc3 nodes to make the bus' DMA mask
propagate to the dwc3 controller instances.

Fixes: 4429e57567bb ("arm64: dts: sdm845: Add node for arm,mmu-500")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index ce69872d5a616354a48bab2b894ba9001a713aea..b4b946d2f9cd7af8f2f31d3318b1dd7d29ae975b 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -1635,6 +1635,7 @@
                        #address-cells = <2>;
                        #size-cells = <2>;
                        ranges;
+                       dma-ranges;
 
                        clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
                                 <&gcc GCC_USB30_PRIM_MASTER_CLK>,
@@ -1663,6 +1664,7 @@
                                compatible = "snps,dwc3";
                                reg = <0 0x0a600000 0 0xcd00>;
                                interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+                               iommus = <&apps_smmu 0x740 0>;
                                snps,dis_u2_susphy_quirk;
                                snps,dis_enblslpm_quirk;
                                phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
@@ -1677,6 +1679,7 @@
                        #address-cells = <2>;
                        #size-cells = <2>;
                        ranges;
+                       dma-ranges;
 
                        clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>,
                                 <&gcc GCC_USB30_SEC_MASTER_CLK>,
@@ -1705,6 +1708,7 @@
                                compatible = "snps,dwc3";
                                reg = <0 0x0a800000 0 0xcd00>;
                                interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+                               iommus = <&apps_smmu 0x760 0>;
                                snps,dis_u2_susphy_quirk;
                                snps,dis_enblslpm_quirk;
                                phys = <&usb_2_hsphy>, <&usb_2_ssphy>;