mlxsw: pci: Permit enabling CFF mode

There are FW versions out there that do not support CFF flood mode, and on
Spectrum-1 in particular, there is no plan to support it at all. mlxsw will
therefore have to support both controlled flood mode as well as CFF. There
are also FW versions out there that claim to support CFF flood mode, but
then reject or ignore configurations enabling the same. The driver thus has
to have a say in whether an attempt to configure CFF flood mode should even
be made, and what to use as a fallback.

Hence express the feature in terms of "does the driver prefer CFF flood
mode?", and "what flood mode the PCI module managed to configure the FW
with". This gives to the driver a chance to determine whether CFF flood
mode configuration should be attempted.

The latter bit was added in previous patches. In this patch, add the bit
that allows the driver to determine whether CFF enablement should be
attempted, and the enablement code itself.

Signed-off-by: Petr Machata <petrm@nvidia.com>
Reviewed-by: Amit Cohen <amcohen@nvidia.com>
Reviewed-by: Ido Schimmel <idosch@nvidia.com>
Link: https://lore.kernel.org/r/41640a0ee58e0a9538f820f7b601a0e35f6449e4.1700503644.git.petrm@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.h b/drivers/net/ethernet/mellanox/mlxsw/core.h
index a93e9c38848aa810c765392c248105b287abbec8..6d11225594dd13f73aa68719f7f827dfbf1caa57 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlxsw/core.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/core.h
@@ -324,7 +324,12 @@ struct mlxsw_config_profile {
        u16     max_regions;
        u8      max_flood_tables;
        u8      max_vid_flood_tables;
+
+       /* Flood mode to use if used_flood_mode. If flood_mode_prefer_cff,
+        * the backup flood mode (if any) when CFF unsupported.
+        */
        u8      flood_mode;
+
        u8      max_fid_offset_flood_tables;
        u16     fid_offset_flood_table_size;
        u8      max_fid_flood_tables;
@@ -340,6 +345,7 @@ struct mlxsw_config_profile {
        u8      kvd_hash_double_parts;
        u8      cqe_time_stamp_type;
        bool    lag_mode_prefer_sw;
+       bool    flood_mode_prefer_cff;
        struct mlxsw_swid_config swid_config[MLXSW_CONFIG_PROFILE_SWID_COUNT];
 };
 

diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci.c b/drivers/net/ethernet/mellanox/mlxsw/pci.c
index 845edd43032b76865e5bf473f1e05e9fe17c9395..0d58f13a7c7d861f6c6f1e17ebd3d4bbafad09ac 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlxsw/pci.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/pci.c
@@ -1248,7 +1248,14 @@ static int mlxsw_pci_config_profile(struct mlxsw_pci *mlxsw_pci, char *mbox,
                mlxsw_cmd_mbox_config_profile_fid_flood_table_size_set(
                        mbox, profile->fid_flood_table_size);
        }
-       if (profile->used_flood_mode) {
+       if (profile->flood_mode_prefer_cff && mlxsw_pci->cff_support) {
+               enum mlxsw_cmd_mbox_config_profile_flood_mode flood_mode =
+                       MLXSW_CMD_MBOX_CONFIG_PROFILE_FLOOD_MODE_CFF;
+
+               mlxsw_cmd_mbox_config_profile_set_flood_mode_set(mbox, 1);
+               mlxsw_cmd_mbox_config_profile_flood_mode_set(mbox, flood_mode);
+               mlxsw_pci->flood_mode = flood_mode;
+       } else if (profile->used_flood_mode) {
                mlxsw_cmd_mbox_config_profile_set_flood_mode_set(
                        mbox, 1);
                mlxsw_cmd_mbox_config_profile_flood_mode_set(