#define _PPC_BOOK3S_64_HW_BREAKPOINT_H
#include <asm/cpu_has_feature.h>
-#include <asm/inst.h>
#ifdef __KERNEL__
struct arch_hw_breakpoint {
#define _ASM_POWERPC_INST_H
#include <asm/ppc-opcode.h>
+#include <asm/reg.h>
#define ___get_user_instr(gu_op, dest, ptr) \
({ \
*/
#if defined(CONFIG_PPC64) || defined(__CHECKER__)
-typedef struct {
- u32 val;
-#ifdef CONFIG_PPC64
- u32 suffix;
-#endif
-} __packed ppc_inst_t;
-
static inline u32 ppc_inst_val(ppc_inst_t x)
{
return x.val;
#define ppc_inst(x) ((ppc_inst_t){ .val = (x) })
#else
-typedef u32 ppc_inst_t;
-
static inline u32 ppc_inst_val(ppc_inst_t x)
{
return x;
/* Macros for setting and retrieving special purpose registers */
#ifndef __ASSEMBLY__
+
+#if defined(CONFIG_PPC64) || defined(__CHECKER__)
+typedef struct {
+ u32 val;
+#ifdef CONFIG_PPC64
+ u32 suffix;
+#endif
+} __packed ppc_inst_t;
+#else
+typedef u32 ppc_inst_t;
+#endif
+
#define mfmsr() ({unsigned long rval; \
asm volatile("mfmsr %0" : "=r" (rval) : \
: "memory"); rval;})
#include <linux/notifier.h>
#include <asm/probes.h>
-#include <asm/inst.h>
typedef ppc_opcode_t uprobe_opcode_t;