GlobalProperty hw_compat_8_2[] = {
{ TYPE_VIRTIO_IOMMU_PCI, "granule", "4k" },
+ { TYPE_VIRTIO_IOMMU_PCI, "aw-bits", "64" },
};
const size_t hw_compat_8_2_len = G_N_ELEMENTS(hw_compat_8_2);
#include "hw/i386/pc.h"
#include "hw/i386/amd_iommu.h"
#include "hw/i386/intel_iommu.h"
+#include "hw/virtio/virtio-iommu.h"
#include "hw/display/ramfb.h"
#include "hw/ide/pci.h"
#include "hw/ide/ahci-pci.h"
/* ICH9 AHCI has 6 ports */
#define MAX_SATA_PORTS 6
+static GlobalProperty pc_q35_compat_defaults[] = {
+ { TYPE_VIRTIO_IOMMU_PCI, "aw-bits", "39" },
+};
+static const size_t pc_q35_compat_defaults_len =
+ G_N_ELEMENTS(pc_q35_compat_defaults);
+
struct ehci_companions {
const char *name;
int func;
machine_class_allow_dynamic_sysbus_dev(m, TYPE_INTEL_IOMMU_DEVICE);
machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE);
machine_class_allow_dynamic_sysbus_dev(m, TYPE_VMBUS_BRIDGE);
+ compat_props_add(m->compat_props,
+ pc_q35_compat_defaults, pc_q35_compat_defaults_len);
}
static void pc_q35_9_0_machine_options(MachineClass *m)
uint8_t bypass = qvirtio_config_readb(dev, 36);
g_assert_cmpint(input_range_start, ==, 0);
- g_assert_cmphex(input_range_end, ==, UINT64_MAX);
+ g_assert_cmphex(input_range_end, >=, UINT32_MAX);
g_assert_cmpint(domain_range_start, ==, 0);
g_assert_cmpint(domain_range_end, ==, UINT32_MAX);
g_assert_cmpint(bypass, ==, 1);