#define FBIN2FREQ(x, y)                ((y) ? (2300 + x) : (4800 + 5 * x))
 #define ath9k_hw_use_flash(_ah)        (!(_ah->ah_flags & AH_USE_EEPROM))
 
-#define AR5416_VER_MASK (eep->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK)
 #define OLC_FOR_AR9280_20_LATER (AR_SREV_9280_20_OR_LATER(ah) && \
                                 ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL))
 #define OLC_FOR_AR9287_10_LATER (AR_SREV_9287_11_OR_LATER(ah) && \
 
 #define AR5416_EEP_NO_BACK_VER       0x1
 #define AR5416_EEP_VER               0xE
+#define AR5416_EEP_VER_MAJOR_SHIFT   12
+#define AR5416_EEP_VER_MAJOR_MASK    0xF000
 #define AR5416_EEP_VER_MINOR_MASK    0x0FFF
 #define AR5416_EEP_MINOR_VER_2       0x2
 #define AR5416_EEP_MINOR_VER_3       0x3
 #define AR9280_TX_GAIN_TABLE_SIZE 22
 
 #define AR9287_EEP_VER               0xE
-#define AR9287_EEP_VER_MINOR_MASK    0xFFF
 #define AR9287_EEP_MINOR_VER_1       0x1
 #define AR9287_EEP_MINOR_VER_2       0x2
 #define AR9287_EEP_MINOR_VER_3       0x3
 
 
 static int ath9k_hw_4k_get_eeprom_ver(struct ath_hw *ah)
 {
-       return ((ah->eeprom.map4k.baseEepHeader.version >> 12) & 0xF);
+       u16 version = ah->eeprom.map4k.baseEepHeader.version;
+
+       return (version & AR5416_EEP_VER_MAJOR_MASK) >>
+               AR5416_EEP_VER_MAJOR_SHIFT;
 }
 
 static int ath9k_hw_4k_get_eeprom_rev(struct ath_hw *ah)
 {
-       return ((ah->eeprom.map4k.baseEepHeader.version) & 0xFFF);
+       u16 version = ah->eeprom.map4k.baseEepHeader.version;
+
+       return version & AR5416_EEP_VER_MINOR_MASK;
 }
 
 #define SIZE_EEPROM_4K (sizeof(struct ar5416_eeprom_4k) / sizeof(u16))
                goto out;
        }
 
-       PR_EEP("Major Version", pBase->version >> 12);
-       PR_EEP("Minor Version", pBase->version & 0xFFF);
+       PR_EEP("Major Version", ath9k_hw_4k_get_eeprom_ver(ah));
+       PR_EEP("Minor Version", ath9k_hw_4k_get_eeprom_rev(ah));
        PR_EEP("Checksum", pBase->checksum);
        PR_EEP("Length", pBase->length);
        PR_EEP("RegDomain1", pBase->regDmn[0]);
 
        xpdMask = pEepData->modalHeader.xpdGain;
 
-       if ((pEepData->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >=
-           AR5416_EEP_MINOR_VER_2) {
+       if (ath9k_hw_4k_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_2)
                pdGainOverlap_t2 =
                        pEepData->modalHeader.pdGainOverlap;
-       } else {
+       else
                pdGainOverlap_t2 = (u16)(MS(REG_READ(ah, AR_PHY_TPCRG5),
                                            AR_PHY_TPCRG5_PD_GAIN_OVERLAP));
-       }
 
        pCalBChans = pEepData->calFreqPier2G;
        numPiers = AR5416_EEP4K_NUM_2G_CAL_PIERS;
 
        memset(ratesArray, 0, sizeof(ratesArray));
 
-       if ((pEepData->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >=
-           AR5416_EEP_MINOR_VER_2) {
+       if (ath9k_hw_4k_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_2)
                ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc;
-       }
 
        ath9k_hw_set_4k_power_per_rate_table(ah, chan,
                                             &ratesArray[0], cfgCtl,
                SM(pModal->iqCalQCh[0], AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF),
                AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF | AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF);
 
-       if ((eep->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >=
-           AR5416_EEP_MINOR_VER_3) {
+       if (ath9k_hw_4k_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_3) {
                txRxAttenLocal = pModal->txRxAttenCh[0];
 
                REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ,
        REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0, AR_PHY_EXT_CCA0_THRESH62,
                      pModal->thresh62);
 
-       if ((eep->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >=
-                                               AR5416_EEP_MINOR_VER_2) {
+       if (ath9k_hw_4k_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_2) {
                REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, AR_PHY_TX_END_DATA_START,
                              pModal->txFrameToDataStart);
                REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, AR_PHY_TX_END_PA_ON,
                              pModal->txFrameToPaOn);
        }
 
-       if ((eep->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >=
-                                               AR5416_EEP_MINOR_VER_3) {
+       if (ath9k_hw_4k_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_3) {
                if (IS_CHAN_HT40(chan))
                        REG_RMW_FIELD(ah, AR_PHY_SETTLING,
                                      AR_PHY_SETTLING_SWITCH,
 
 
 static int ath9k_hw_ar9287_get_eeprom_ver(struct ath_hw *ah)
 {
-       return (ah->eeprom.map9287.baseEepHeader.version >> 12) & 0xF;
+       u16 version = ah->eeprom.map9287.baseEepHeader.version;
+
+       return (version & AR5416_EEP_VER_MAJOR_MASK) >>
+               AR5416_EEP_VER_MAJOR_SHIFT;
 }
 
 static int ath9k_hw_ar9287_get_eeprom_rev(struct ath_hw *ah)
 {
-       return (ah->eeprom.map9287.baseEepHeader.version) & 0xFFF;
+       u16 version = ah->eeprom.map9287.baseEepHeader.version;
+
+       return version & AR5416_EEP_VER_MINOR_MASK;
 }
 
 static bool __ath9k_hw_ar9287_fill_eeprom(struct ath_hw *ah)
                goto out;
        }
 
-       PR_EEP("Major Version", pBase->version >> 12);
-       PR_EEP("Minor Version", pBase->version & 0xFFF);
+       PR_EEP("Major Version", ath9k_hw_ar9287_get_eeprom_ver(ah));
+       PR_EEP("Minor Version", ath9k_hw_ar9287_get_eeprom_rev(ah));
        PR_EEP("Checksum", pBase->checksum);
        PR_EEP("Length", pBase->length);
        PR_EEP("RegDomain1", pBase->regDmn[0]);
 
        xpdMask = pEepData->modalHeader.xpdGain;
 
-       if ((pEepData->baseEepHeader.version & AR9287_EEP_VER_MINOR_MASK) >=
-           AR9287_EEP_MINOR_VER_2)
+       if (ath9k_hw_ar9287_get_eeprom_rev(ah) >= AR9287_EEP_MINOR_VER_2)
                pdGainOverlap_t2 = pEepData->modalHeader.pdGainOverlap;
        else
                pdGainOverlap_t2 = (u16)(MS(REG_READ(ah, AR_PHY_TPCRG5),
 
        memset(ratesArray, 0, sizeof(ratesArray));
 
-       if ((pEepData->baseEepHeader.version & AR9287_EEP_VER_MINOR_MASK) >=
-           AR9287_EEP_MINOR_VER_2)
+       if (ath9k_hw_ar9287_get_eeprom_rev(ah) >= AR9287_EEP_MINOR_VER_2)
                ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc;
 
        ath9k_hw_set_ar9287_power_per_rate_table(ah, chan,
 
 
 static int ath9k_hw_def_get_eeprom_ver(struct ath_hw *ah)
 {
-       return ((ah->eeprom.def.baseEepHeader.version >> 12) & 0xF);
+       u16 version = ah->eeprom.def.baseEepHeader.version;
+
+       return (version & AR5416_EEP_VER_MAJOR_MASK) >>
+               AR5416_EEP_VER_MAJOR_SHIFT;
 }
 
 static int ath9k_hw_def_get_eeprom_rev(struct ath_hw *ah)
 {
-       return ((ah->eeprom.def.baseEepHeader.version) & 0xFFF);
+       u16 version = ah->eeprom.def.baseEepHeader.version;
+
+       return version & AR5416_EEP_VER_MINOR_MASK;
 }
 
 #define SIZE_EEPROM_DEF (sizeof(struct ar5416_eeprom_def) / sizeof(u16))
                goto out;
        }
 
-       PR_EEP("Major Version", pBase->version >> 12);
-       PR_EEP("Minor Version", pBase->version & 0xFFF);
+       PR_EEP("Major Version", ath9k_hw_def_get_eeprom_ver(ah));
+       PR_EEP("Minor Version", ath9k_hw_def_get_eeprom_rev(ah));
        PR_EEP("Checksum", pBase->checksum);
        PR_EEP("Length", pBase->length);
        PR_EEP("RegDomain1", pBase->regDmn[0]);
        case EEP_TXGAIN_TYPE:
                return pBase->txGainType;
        case EEP_OL_PWRCTRL:
-               if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_19)
+               if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_19)
                        return pBase->openLoopPwrCntl ? true : false;
                else
                        return false;
        case EEP_RC_CHAIN_MASK:
-               if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_19)
+               if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_19)
                        return pBase->rcChainMask;
                else
                        return 0;
        case EEP_DAC_HPWR_5G:
-               if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_20)
+               if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_20)
                        return pBase->dacHiPwrMode_5G;
                else
                        return 0;
        case EEP_FRAC_N_5G:
-               if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_22)
+               if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_22)
                        return pBase->frac_n_5g;
                else
                        return 0;
        case EEP_PWR_TABLE_OFFSET:
-               if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_21)
+               if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_21)
                        return pBase->pwr_table_offset;
                else
                        return AR5416_PWR_TABLE_OFFSET_DB;
                                  u8 txRxAttenLocal, int regChainOffset, int i)
 {
        ENABLE_REG_RMW_BUFFER(ah);
-       if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_3) {
+       if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_3) {
                txRxAttenLocal = pModal->txRxAttenCh[i];
 
                if (AR_SREV_9280_20_OR_LATER(ah)) {
                              pModal->thresh62);
        }
 
-       if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_2) {
+       if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_2) {
                REG_RMW_FIELD(ah, AR_PHY_RF_CTL2,
                              AR_PHY_TX_END_DATA_START,
                              pModal->txFrameToDataStart);
                              pModal->txFrameToPaOn);
        }
 
-       if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_3) {
+       if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_3) {
                if (IS_CHAN_HT40(chan))
                        REG_RMW_FIELD(ah, AR_PHY_SETTLING,
                                      AR_PHY_SETTLING_SWITCH,
        }
 
        if (AR_SREV_9280_20_OR_LATER(ah) &&
-           AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_19)
+           ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_19)
                REG_RMW_FIELD(ah, AR_PHY_CCK_TX_CTRL,
                              AR_PHY_CCK_TX_CTRL_TX_DAC_SCALE_CCK,
                              pModal->miscBits);
 
 
-       if (AR_SREV_9280_20(ah) && AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_20) {
+       if (AR_SREV_9280_20(ah) &&
+           ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_20) {
                if (IS_CHAN_2GHZ(chan))
                        REG_RMW_FIELD(ah, AR_AN_TOP1, AR_AN_TOP1_DACIPMODE,
                                        eep->baseEepHeader.dacLpMode);
 
        pwr_table_offset = ah->eep_ops->get_eeprom(ah, EEP_PWR_TABLE_OFFSET);
 
-       if ((pEepData->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >=
-           AR5416_EEP_MINOR_VER_2) {
+       if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_2) {
                pdGainOverlap_t2 =
                        pEepData->modalHeader[modalIdx].pdGainOverlap;
        } else {
 
        memset(ratesArray, 0, sizeof(ratesArray));
 
-       if ((pEepData->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >=
-           AR5416_EEP_MINOR_VER_2) {
+       if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_2)
                ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc;
-       }
 
        ath9k_hw_set_def_power_per_rate_table(ah, chan,
                                               &ratesArray[0], cfgCtl,
 
                if (is_40) {
                        u8 power_ht40delta;
                        struct ar5416_eeprom_def *eep = &ah->eeprom.def;
+                       u16 eeprom_rev = ah->eep_ops->get_eeprom_rev(ah);
 
-                       if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_2) {
+                       if (eeprom_rev >= AR5416_EEP_MINOR_VER_2) {
                                bool is_2ghz;
                                struct modal_eep_header *pmodal;