target-mips: fix for incorrect multiplication with MULQ_S.PH
authorPetar Jovanovic <petarj@mips.com>
Wed, 6 Feb 2013 17:05:25 +0000 (18:05 +0100)
committerAurelien Jarno <aurelien@aurel32.net>
Sat, 23 Feb 2013 21:20:44 +0000 (22:20 +0100)
The change corrects sign-related issue with MULQ_S.PH. It also includes
extension to the already existing test which will trigger the issue.

Signed-off-by: Petar Jovanovic <petarj@mips.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-mips/dsp_helper.c
tests/tcg/mips/mips32-dspr2/mulq_s_ph.c

index 96cb0447e28d37a71fe0c0a035ec68d1632e0446..6781da8214c841da698309290acf73f641154035 100644 (file)
@@ -652,7 +652,7 @@ static inline int32_t mipsdsp_sat16_mul_q15_q15(uint16_t a, uint16_t b,
         temp = 0x7FFF0000;
         set_DSPControl_overflow_flag(1, 21, env);
     } else {
-        temp = ((uint32_t)a * (uint32_t)b);
+        temp = (int16_t)a * (int16_t)b;
         temp = temp << 1;
     }
 
index d0f7674a38ea4fe3d4d5b4a9e629cea292444322..00e015542e69a95015d04267eabb55a6e4216b32 100644 (file)
@@ -6,6 +6,21 @@ int main()
     int rd, rs, rt, dsp;
     int result, resultdsp;
 
+    rs = 0x80000000;
+    rt = 0x0ffc0000;
+    result = 0xF0040000;
+    resultdsp = 0;
+
+    __asm
+        ("mulq_s.ph %0, %2, %3\n\t"
+         "rddsp %1\n\t"
+         : "=r"(rd), "=r"(dsp)
+         : "r"(rs), "r"(rt)
+        );
+    dsp = (dsp >> 21) & 0x01;
+    assert(rd  == result);
+    assert(dsp == resultdsp);
+
     rs = 0x80001234;
     rt = 0x80004321;
     result = 0x7FFF098B;