In the existing code, the SHIM_SYNC::SYNC_GO bit is set, and the code
waits for it to return to zero.
That second wait part is just wrong: the SYNC_GO bit is *write-only* so
there's no way to know if it's cleared by hardware. The code works
because the value for a read-only bit is zero, but that's really just
luck.
Simplify the sequence to a plain read-modify-write.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Link: https://lore.kernel.org/r/20230314015410.487311-6-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 
 {
        void __iomem *shim = sdw->link_res->shim;
        u32 sync_reg;
-       int ret;
 
        /* Read SYNC register */
        sync_reg = intel_readl(shim, SDW_SHIM_SYNC);
         */
        sync_reg |= SDW_SHIM_SYNC_SYNCGO;
 
-       ret = intel_clear_bit(shim, SDW_SHIM_SYNC, sync_reg,
-                             SDW_SHIM_SYNC_SYNCGO);
-
-       if (ret < 0)
-               dev_err(sdw->cdns.dev, "SyncGO clear failed: %d\n", ret);
+       intel_writel(shim, SDW_SHIM_SYNC, sync_reg);
 
-       return ret;
+       return 0;
 }
 
 static int intel_shim_sync_go(struct sdw_intel *sdw)