arm64: dts: imx8mn-beacon: Enable RTS-CTS on UART3

commit 5446ff1a67160ad92d9aae9530846aa54750be36 upstream.

There is a header for a DB9 serial port, but any attempts to use
hardware handshaking fail.  Enable RTS and CTS pin muxing and enable
handshaking in the uart node.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mn-beacon-baseboard.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-beacon-baseboard.dtsi
index 376ca8ff721331b86c74e353053ff4fb646cc67f..e69fd41b46d0ed1902a411572cb64186623a4771 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mn-beacon-baseboard.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn-beacon-baseboard.dtsi
@@ -176,6 +176,7 @@
        pinctrl-0 = <&pinctrl_uart3>;
        assigned-clocks = <&clk IMX8MN_CLK_UART3>;
        assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>;
+       uart-has-rtscts;
        status = "okay";
 };
 
@@ -259,6 +260,8 @@
                fsl,pins = <
                        MX8MN_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX   0x40
                        MX8MN_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX   0x40
+                       MX8MN_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B        0x40
+                       MX8MN_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x40
                >;
        };