ARM: tegra: Fix nvidia,io-reset properties
authorThierry Reding <treding@nvidia.com>
Fri, 4 Nov 2022 12:21:08 +0000 (13:21 +0100)
committerThierry Reding <treding@nvidia.com>
Thu, 17 Nov 2022 23:21:49 +0000 (00:21 +0100)
Rename the unknown nvidia,ioreset property to nvidia,io-reset, as
specified in the DT bindings and supported by the driver.

Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm/boot/dts/tegra30-asus-transformer-common.dtsi
arch/arm/boot/dts/tegra30-pegatron-chagall.dts

index c27e70d8bf2b91dcfb88bfcee5ae2923383e7ef1..21a02cfeb22f3d633434ef3addfdc081c3c83a4e 100644 (file)
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                                nvidia,lock = <0>;
-                               nvidia,ioreset = <0>;
+                               nvidia,io-reset = <0>;
                        };
 
                        /* SDMMC3 pinmux */
                                nvidia,tristate = <TEGRA_PIN_ENABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                                nvidia,lock = <0>;
-                               nvidia,ioreset = <0>;
+                               nvidia,io-reset = <0>;
                        };
 
                        /* GPIO keys pinmux */
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                                nvidia,lock = <0>;
-                               nvidia,ioreset = <0>;
+                               nvidia,io-reset = <0>;
                        };
 
                        vi_d10_pt2 {
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
                                nvidia,lock = <0>;
-                               nvidia,ioreset = <0>;
+                               nvidia,io-reset = <0>;
                        };
 
                        vi_mclk_pt1 {
index 7c81f0205549968b902f3484b697a271a11d9184..cce088eaca91ef599d40c8b4dbd37d6484cbf2b3 100644 (file)
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                                nvidia,lock = <0>;
-                               nvidia,ioreset = <0>;
+                               nvidia,io-reset = <0>;
                        };
 
                        /* SDMMC3 pinmux */
                                nvidia,tristate = <TEGRA_PIN_ENABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                                nvidia,lock = <0>;
-                               nvidia,ioreset = <0>;
+                               nvidia,io-reset = <0>;
                        };
 
                        pu1 {
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                                nvidia,lock = <0>;
-                               nvidia,ioreset = <0>;
+                               nvidia,io-reset = <0>;
                        };
 
                        vi_d10_pt2 {
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
                                nvidia,lock = <0>;
-                               nvidia,ioreset = <0>;
+                               nvidia,io-reset = <0>;
                        };
 
                        vi_mclk_pt1 {