crypto: octeontx2 - remove errata workaround for CN10KB or CN10KA B0 chip.

Adds code to not execute CPT errata "when CPT_AF_DIAG[FLT_DIS] = 0 and a
CPT engine access to LLC/DRAM encounters  a fault/poison, a rare case
may result in unpredictable data being delivered to a CPT engine"
workaround on CN10KA B0/CN10KB HW as it is fixed on these chips.

Signed-off-by: Srujana Challa <schalla@marvell.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/drivers/crypto/marvell/octeontx2/otx2_cpt_common.h b/drivers/crypto/marvell/octeontx2/otx2_cpt_common.h
index 746b049c6c44ce73888c03d0c560de8fcf6a0362..ba1682a213e3756e60664c6d39a23b2887b7ba09 100644 (file)
--- a/drivers/crypto/marvell/octeontx2/otx2_cpt_common.h
+++ b/drivers/crypto/marvell/octeontx2/otx2_cpt_common.h
@@ -186,6 +186,13 @@ static inline void otx2_cpt_set_hw_caps(struct pci_dev *pdev,
        }
 }
 
+static inline bool cpt_is_errata_38550_exists(struct pci_dev *pdev)
+{
+       if (is_dev_otx2(pdev) || is_dev_cn10ka_ax(pdev))
+               return true;
+
+       return false;
+}
 
 static inline bool cpt_feature_sgv2(struct pci_dev *pdev)
 {

diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c b/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c
index 7fccc348f66e11c018f34081b8b4da5a4738d511..e319aa1ff1191e8da12428de0953775f41b083f9 100644 (file)
--- a/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c
+++ b/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c
@@ -1254,10 +1254,12 @@ int otx2_cpt_create_eng_grps(struct otx2_cptpf_dev *cptpf,
         * encounters a fault/poison, a rare case may result in
         * unpredictable data being delivered to a CPT engine.
         */
-       otx2_cpt_read_af_reg(&cptpf->afpf_mbox, pdev, CPT_AF_DIAG, &reg_val,
-                            BLKADDR_CPT0);
-       otx2_cpt_write_af_reg(&cptpf->afpf_mbox, pdev, CPT_AF_DIAG,
-                             reg_val | BIT_ULL(24), BLKADDR_CPT0);
+       if (cpt_is_errata_38550_exists(pdev)) {
+               otx2_cpt_read_af_reg(&cptpf->afpf_mbox, pdev, CPT_AF_DIAG,
+                                    &reg_val, BLKADDR_CPT0);
+               otx2_cpt_write_af_reg(&cptpf->afpf_mbox, pdev, CPT_AF_DIAG,
+                                     reg_val | BIT_ULL(24), BLKADDR_CPT0);
+       }
 
        mutex_unlock(&eng_grps->lock);
        return 0;