Documentation: ABI: coresight-tpdm: Fix Bit[3] description indentation
authorBagas Sanjaya <bagasdotme@gmail.com>
Tue, 17 Oct 2023 09:56:08 +0000 (16:56 +0700)
committerSuzuki K Poulose <suzuki.poulose@arm.com>
Thu, 16 Nov 2023 11:35:40 +0000 (11:35 +0000)
Stephen Rothwell reported htmldocs warnings when merging coresight tree:

Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm:48: ERROR: Unexpected indentation.
Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm:48: WARNING: Block quote ends without a blank line; unexpected unindent.

Fix indentation alignment for Bit[3] list entry in dsb_mode description to
silence above warnings.

Fixes: 018e43ad1eee ("coresight-tpdm: Add node to set dsb programming mode")
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Closes: https://lore.kernel.org/linux-next/20231017143324.75387a21@canb.auug.org.au/
Signed-off-by: Bagas Sanjaya <bagasdotme@gmail.com>
Link: https://lore.kernel.org/r/20231017095608.136277-1-bagasdotme@gmail.com
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm

index f07218e788439d04a817a222e818506212cde136..4dd49b159543b6a60a0e76170eb9a592c3410b1f 100644 (file)
@@ -54,8 +54,8 @@ Description:
                Accepts the value needs to be greater than 0. What data
                bits do is listed below.
                Bit[0:1] : Test mode control bit for choosing the inputs.
-               Bit[3] : Set to 0 for low performance mode.
-                                Set to 1 for high performance mode.
+               Bit[3] : Set to 0 for low performance mode. Set to 1 for high
+               performance mode.
                Bit[4:8] : Select byte lane for high performance mode.
 
 What:          /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_idx