arm64: dts: mediatek: Add cpufreq nodes for MT8192

Add the cpufreq nodes for MT8192 SoC.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230317061944.15434-1-allen-kh.cheng@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index faaff39155dca623fd329d68ea29540d016fc2ff..d28f5b1bc55127d22d24e7bd773f59d0550ee488 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -70,6 +70,7 @@
                        d-cache-line-size = <64>;
                        d-cache-sets = <128>;
                        next-level-cache = <&l2_0>;
+                       performance-domains = <&performance 0>;
                        capacity-dmips-mhz = <530>;
                };
 
@@ -87,6 +88,7 @@
                        d-cache-line-size = <64>;
                        d-cache-sets = <128>;
                        next-level-cache = <&l2_0>;
+                       performance-domains = <&performance 0>;
                        capacity-dmips-mhz = <530>;
                };
 
@@ -104,6 +106,7 @@
                        d-cache-line-size = <64>;
                        d-cache-sets = <128>;
                        next-level-cache = <&l2_0>;
+                       performance-domains = <&performance 0>;
                        capacity-dmips-mhz = <530>;
                };
 
@@ -121,6 +124,7 @@
                        d-cache-line-size = <64>;
                        d-cache-sets = <128>;
                        next-level-cache = <&l2_0>;
+                       performance-domains = <&performance 0>;
                        capacity-dmips-mhz = <530>;
                };
 
@@ -138,6 +142,7 @@
                        d-cache-line-size = <64>;
                        d-cache-sets = <256>;
                        next-level-cache = <&l2_1>;
+                       performance-domains = <&performance 1>;
                        capacity-dmips-mhz = <1024>;
                };
 
@@ -155,6 +160,7 @@
                        d-cache-line-size = <64>;
                        d-cache-sets = <256>;
                        next-level-cache = <&l2_1>;
+                       performance-domains = <&performance 1>;
                        capacity-dmips-mhz = <1024>;
                };
 
@@ -172,6 +178,7 @@
                        d-cache-line-size = <64>;
                        d-cache-sets = <256>;
                        next-level-cache = <&l2_1>;
+                       performance-domains = <&performance 1>;
                        capacity-dmips-mhz = <1024>;
                };
 
@@ -189,6 +196,7 @@
                        d-cache-line-size = <64>;
                        d-cache-sets = <256>;
                        next-level-cache = <&l2_1>;
+                       performance-domains = <&performance 1>;
                        capacity-dmips-mhz = <1024>;
                };
 
@@ -405,6 +413,12 @@
                compatible = "simple-bus";
                ranges;
 
+               performance: performance-controller@11bc10 {
+                       compatible = "mediatek,cpufreq-hw";
+                       reg = <0 0x0011bc10 0 0x120>, <0 0x0011bd30 0 0x120>;
+                       #performance-domain-cells = <1>;
+               };
+
                gic: interrupt-controller@c000000 {
                        compatible = "arm,gic-v3";
                        #interrupt-cells = <4>;