clk: mediatek: clk-mt7986-topckgen: Migrate to mtk_clk_simple_probe()
authorAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Fri, 20 Jan 2023 09:20:53 +0000 (10:20 +0100)
committerStephen Boyd <sboyd@kernel.org>
Tue, 31 Jan 2023 00:46:03 +0000 (16:46 -0800)
There are no more non-common calls in clk_mt7986_topckgen_probe():
migrate this driver to mtk_clk_simple_probe().

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20230120092053.182923-24-angelogioacchino.delregno@collabora.com
Tested-by: Mingming Su <mingming.su@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/mediatek/clk-mt7986-topckgen.c

index 36553f0c13fe9f448dc716b9fae1fb10d14a28b9..dff9976fa6890c8f0c9c2a2730030abfc64056a6 100644 (file)
@@ -290,53 +290,24 @@ static const struct mtk_mux top_muxes[] = {
                             0x1C4, 5),
 };
 
-static int clk_mt7986_topckgen_probe(struct platform_device *pdev)
-{
-       struct clk_hw_onecell_data *clk_data;
-       struct device_node *node = pdev->dev.of_node;
-       int r;
-       void __iomem *base;
-       int nr = ARRAY_SIZE(top_fixed_clks) + ARRAY_SIZE(top_divs) +
-                ARRAY_SIZE(top_muxes);
-
-       base = of_iomap(node, 0);
-       if (!base) {
-               pr_err("%s(): ioremap failed\n", __func__);
-               return -ENOMEM;
-       }
-
-       clk_data = mtk_alloc_clk_data(nr);
-       if (!clk_data)
-               return -ENOMEM;
-
-       mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks),
-                                   clk_data);
-       mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data);
-       mtk_clk_register_muxes(&pdev->dev, top_muxes,
-                              ARRAY_SIZE(top_muxes), node,
-                              &mt7986_clk_lock, clk_data);
-
-       r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
-
-       if (r) {
-               pr_err("%s(): could not register clock provider: %d\n",
-                      __func__, r);
-               goto free_topckgen_data;
-       }
-       return r;
-
-free_topckgen_data:
-       mtk_free_clk_data(clk_data);
-       return r;
-}
+static const struct mtk_clk_desc topck_desc = {
+       .fixed_clks = top_fixed_clks,
+       .num_fixed_clks = ARRAY_SIZE(top_fixed_clks),
+       .factor_clks = top_divs,
+       .num_factor_clks = ARRAY_SIZE(top_divs),
+       .mux_clks = top_muxes,
+       .num_mux_clks = ARRAY_SIZE(top_muxes),
+       .clk_lock = &mt7986_clk_lock,
+};
 
 static const struct of_device_id of_match_clk_mt7986_topckgen[] = {
-       { .compatible = "mediatek,mt7986-topckgen", },
-       {}
+       { .compatible = "mediatek,mt7986-topckgen", .data = &topck_desc },
+       { /* sentinel */ }
 };
 
 static struct platform_driver clk_mt7986_topckgen_drv = {
-       .probe = clk_mt7986_topckgen_probe,
+       .probe = mtk_clk_simple_probe,
+       .remove = mtk_clk_simple_remove,
        .driver = {
                .name = "clk-mt7986-topckgen",
                .of_match_table = of_match_clk_mt7986_topckgen,