arm64: qcom: ipq6018: add usb3 DT description

Based on downstream codeaurora code.

Tested (USB2 only) on IPQ6010 based hardware.

Signed-off-by: Kathiravan T <kathirav@codeaurora.org>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Link: https://lore.kernel.org/r/ebc2d340d566fa2d43127e253d5b8b134a87a78e.1630389452.git.baruch@tkos.co.il
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index d2fe58e0eb7aa9f38537b97c15f244cbb842a489..153714123b64d546e6df57b01929bde9fa71ff96 100644 (file)
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -671,6 +671,89 @@
                        };
                };
 
+               ssphy_0: ssphy@78000 {
+                       compatible = "qcom,ipq6018-qmp-usb3-phy";
+                       reg = <0x0 0x78000 0x0 0x1C4>;
+                       #address-cells = <2>;
+                       #size-cells = <2>;
+                       #clock-cells = <1>;
+                       ranges;
+
+                       clocks = <&gcc GCC_USB0_AUX_CLK>,
+                                <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, <&xo>;
+                       clock-names = "aux", "cfg_ahb", "ref";
+
+                       resets = <&gcc GCC_USB0_PHY_BCR>,
+                                <&gcc GCC_USB3PHY_0_PHY_BCR>;
+                       reset-names = "phy","common";
+                       status = "disabled";
+
+                       usb0_ssphy: lane@78200 {
+                               reg = <0x0 0x00078200 0x0 0x130>, /* Tx */
+                                     <0x0 0x00078400 0x0 0x200>, /* Rx */
+                                     <0x0 0x00078800 0x0 0x1F8>, /* PCS */
+                                     <0x0 0x00078600 0x0 0x044>; /* PCS misc */
+                               #phy-cells = <0>;
+                               clocks = <&gcc GCC_USB0_PIPE_CLK>;
+                               clock-names = "pipe0";
+                               clock-output-names = "gcc_usb0_pipe_clk_src";
+                       };
+               };
+
+               qusb_phy_0: qusb@79000 {
+                       compatible = "qcom,ipq6018-qusb2-phy";
+                       reg = <0x0 0x079000 0x0 0x180>;
+                       #phy-cells = <0>;
+
+                       clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
+                               <&xo>;
+                       clock-names = "cfg_ahb", "ref";
+
+                       resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
+                       status = "disabled";
+               };
+
+               usb3: usb3@8A00000 {
+                       compatible = "qcom,ipq6018-dwc3", "qcom,dwc3";
+                       reg = <0x0 0x8AF8800 0x0 0x400>;
+                       #address-cells = <2>;
+                       #size-cells = <2>;
+                       ranges;
+
+                       clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
+                               <&gcc GCC_USB0_MASTER_CLK>,
+                               <&gcc GCC_USB0_SLEEP_CLK>,
+                               <&gcc GCC_USB0_MOCK_UTMI_CLK>;
+                       clock-names = "sys_noc_axi",
+                               "master",
+                               "sleep",
+                               "mock_utmi";
+
+                       assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
+                                         <&gcc GCC_USB0_MASTER_CLK>,
+                                         <&gcc GCC_USB0_MOCK_UTMI_CLK>;
+                       assigned-clock-rates = <133330000>,
+                                              <133330000>,
+                                              <20000000>;
+
+                       resets = <&gcc GCC_USB0_BCR>;
+                       status = "disabled";
+
+                       dwc_0: dwc3@8A00000 {
+                               compatible = "snps,dwc3";
+                               reg = <0x0 0x8A00000 0x0 0xcd00>;
+                               interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
+                               phys = <&qusb_phy_0>, <&usb0_ssphy>;
+                               phy-names = "usb2-phy", "usb3-phy";
+                               tx-fifo-resize;
+                               snps,is-utmi-l1-suspend;
+                               snps,hird-threshold = /bits/ 8 <0x0>;
+                               snps,dis_u2_susphy_quirk;
+                               snps,dis_u3_susphy_quirk;
+                               snps,ref-clock-period-ns = <0x32>;
+                               dr_mode = "host";
+                       };
+               };
        };
 
        wcss: wcss-smp2p {