pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
/* South bridge -> IP5 */
- pci_dev = pci_create_simple_multifunction(pci_bus,
- PCI_DEVFN(FULOONG2E_VIA_SLOT, 0),
- TYPE_VT82C686B_ISA);
+ pci_dev = pci_new_multifunction(PCI_DEVFN(FULOONG2E_VIA_SLOT, 0),
+ TYPE_VT82C686B_ISA);
+
+ /* Set properties on individual devices before realizing the south bridge */
+ if (machine->audiodev) {
+ dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ac97"));
+ qdev_prop_set_string(dev, "audiodev", machine->audiodev);
+ }
+
+ pci_realize_and_unref(pci_dev, pci_bus, &error_abort);
+
object_property_add_alias(OBJECT(machine), "rtc-time",
object_resolve_path_component(OBJECT(pci_dev),
"rtc"),
mc->default_ram_size = 256 * MiB;
mc->default_ram_id = "fuloong2e.ram";
mc->minimum_page_bits = 14;
+ machine_add_audiodev_property(mc);
}
DEFINE_MACHINE("fuloong2e", mips_fuloong2e_machine_init)
pci_bus_irqs(pci_bus, pegasos2_pci_irq, pm, PCI_NUM_PINS);
/* VIA VT8231 South Bridge (multifunction PCI device) */
- via = OBJECT(pci_create_simple_multifunction(pci_bus, PCI_DEVFN(12, 0),
- TYPE_VT8231_ISA));
+ via = OBJECT(pci_new_multifunction(PCI_DEVFN(12, 0), TYPE_VT8231_ISA));
+
+ /* Set properties on individual devices before realizing the south bridge */
+ if (machine->audiodev) {
+ dev = PCI_DEVICE(object_resolve_path_component(via, "ac97"));
+ qdev_prop_set_string(DEVICE(dev), "audiodev", machine->audiodev);
+ }
+
+ pci_realize_and_unref(PCI_DEVICE(via), pci_bus, &error_abort);
for (i = 0; i < PCI_NUM_PINS; i++) {
pm->via_pirq[i] = qdev_get_gpio_in_named(DEVICE(via), "pirq", i);
}
mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("7457_v1.2");
mc->default_ram_id = "pegasos2.ram";
mc->default_ram_size = 512 * MiB;
+ machine_add_audiodev_property(mc);
vhc->cpu_in_nested = pegasos2_cpu_in_nested;
vhc->hypercall = pegasos2_hypercall;