mmc: sdhci_am654: Add ITAPDLYSEL in sdhci_j721e_4bit_set_clock

Add ITAPDLYSEL to sdhci_j721e_4bit_set_clock function.
This allows to set the correct ITAPDLY for timings that
do not carry out tuning.

Fixes: 1accbced1c32 ("mmc: sdhci_am654: Add Support for 4 bit IP on J721E")
Signed-off-by: Judith Mendez <jm@ti.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20240320223837.959900-7-jm@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c
index 888bfda0ebc0e8f2f41daef24717072d4e16f56e..884d1b53180d7c47b24c76d3267d6dfe8fcc1fef 100644 (file)
--- a/drivers/mmc/host/sdhci_am654.c
+++ b/drivers/mmc/host/sdhci_am654.c
@@ -320,6 +320,7 @@ static void sdhci_j721e_4bit_set_clock(struct sdhci_host *host,
        unsigned char timing = host->mmc->ios.timing;
        u32 otap_del_sel;
        u32 itap_del_ena;
+       u32 itap_del_sel;
        u32 mask, val;
 
        /* Setup DLL Output TAP delay */
@@ -329,13 +330,18 @@ static void sdhci_j721e_4bit_set_clock(struct sdhci_host *host,
        val = (0x1 << OTAPDLYENA_SHIFT) |
              (otap_del_sel << OTAPDLYSEL_SHIFT);
 
+       /* Setup Input TAP delay */
        itap_del_ena = sdhci_am654->itap_del_ena[timing];
+       itap_del_sel = sdhci_am654->itap_del_sel[timing];
 
-       mask |= ITAPDLYENA_MASK;
-       val |= (itap_del_ena << ITAPDLYENA_SHIFT);
+       mask |= ITAPDLYENA_MASK | ITAPDLYSEL_MASK;
+       val |= (itap_del_ena << ITAPDLYENA_SHIFT) |
+              (itap_del_sel << ITAPDLYSEL_SHIFT);
 
+       regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPCHGWIN_MASK,
+                          1 << ITAPCHGWIN_SHIFT);
        regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, val);
-
+       regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPCHGWIN_MASK, 0);
        regmap_update_bits(sdhci_am654->base, PHY_CTRL5, CLKBUFSEL_MASK,
                           sdhci_am654->clkbuf_sel);