ARM: dts: rzg1: Add reset control properties for display

Add reset control properties to the devices node for the Display Units
on all supported RZ/G1 SoCs.  Note that on these SoCs, there is only a
single reset for all DU channels.

Join the clocks lines while at it, to increase uniformity.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20200218133019.22299-3-geert+renesas@glider.be

diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 1cd19a569bd0fb66ccc0cf72b568682d4f53e475..e8b340bb99bc303183613ed3d5778ce87200e32c 100644 (file)
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -1669,9 +1669,10 @@
                        reg = <0 0xfeb00000 0 0x40000>;
                        interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 724>,
-                                <&cpg CPG_MOD 723>;
+                       clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
                        clock-names = "du.0", "du.1";
+                       resets = <&cpg 724>;
+                       reset-names = "du.0";
                        status = "disabled";
 
                        ports {

diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index 1c82dd0abd76c4c90d0f5d49431612c1156b8da2..def840b8b2d3c0c482a4e2d27ea644caf1129bad 100644 (file)
--- a/arch/arm/boot/dts/r8a7744.dtsi
+++ b/arch/arm/boot/dts/r8a7744.dtsi
@@ -1655,9 +1655,10 @@
                        reg = <0 0xfeb00000 0 0x40000>;
                        interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 724>,
-                                <&cpg CPG_MOD 723>;
+                       clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
                        clock-names = "du.0", "du.1";
+                       resets = <&cpg 724>;
+                       reset-names = "du.0";
                        status = "disabled";
 
                        ports {

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 3b413658eb8d8fac66180e1d4a1dc485f709d27c..7ab58d8bb74010d6a014b054272d1cd5c8378011 100644 (file)
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -1510,6 +1510,8 @@
                                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
                        clock-names = "du.0", "du.1";
+                       resets = <&cpg 724>;
+                       reset-names = "du.0";
                        status = "disabled";
 
                        ports {

diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index 6efcef1670e15a956c55a7f2b07dec561c865b7d..f5515319227609a4f587cebe7ff79003e17c4b86 100644 (file)
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -942,9 +942,10 @@
                        reg = <0 0xfeb00000 0 0x40000>;
                        interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 724>,
-                                <&cpg CPG_MOD 723>;
+                       clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
                        clock-names = "du.0", "du.1";
+                       resets = <&cpg 724>;
+                       reset-names = "du.0";
                        status = "disabled";
 
                        ports {