RDMA/hns: Disable local invalidate operation

When function reset and local invalidate are mixed, HNS RoCEE may hang.
Before introducing the cause of the problem, two hardware internal
concepts need to be introduced:

    1. Execution queue: The queue of hardware execution instructions,
    function reset and local invalidate are queued for execution in this
    queue.

    2.Local queue: A queue that stores local operation instructions. The
    instructions in the local queue will be sent to the execution queue
    for execution. The instructions in the local queue will not be removed
    until the execution is completed.

The reason for the problem is as follows:

    1. There is a function reset instruction in the execution queue, which
    is currently being executed. A necessary condition for the successful
    execution of function reset is: the hardware pipeline needs to empty
    the instructions that were not completed before;

    2. A local invalidate instruction at the head of the local queue is
    sent to the execution queue. Now there are two instructions in the
    execution queue, the first is the function reset instruction, and the
    second is the local invalidate instruction, which will be executed in
    se quence;

    3. The user has issued many local invalidate operations, causing the
    local queue to be filled up.

    4. The user still has a new local operation command and is queuing to
    enter the local queue. But the local queue is full and cannot receive
    new instructions, this instruction is temporarily stored at the
    hardware pipeline.

    5. The function reset has been waiting for the instruction before the
    hardware pipeline stage is drained. The hardware pipeline stage also
    caches a local invalidate instruction, so the function reset cannot be
    completed, and the instructions after it cannot be executed.

These factors together cause the execution logic deadlock of the hardware,
and the consequence is that RoCEE will not have any response.  Considering
that the local operation command may potentially cause RoCEE to hang, this
feature is no longer supported.

Fixes: e93df0108579 ("RDMA/hns: Support local invalidate for hip08 in kernel space")
Signed-off-by: Yangyang Li <liyangyang20@huawei.com>
Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
Signed-off-by: Haoyue Xu <xuhaoyue1@hisilicon.com>
Link: https://lore.kernel.org/r/20221024083814.1089722-2-xuhaoyue1@hisilicon.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>

diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index 1ead35fb031b0a11cf4b19db0b0a2ba289337c7a..7f5a4769cee032a98012f2469c9547a39377cfed 100644 (file)
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -118,7 +118,6 @@ static const u32 hns_roce_op_code[] = {
        HR_OPC_MAP(ATOMIC_CMP_AND_SWP,          ATOM_CMP_AND_SWAP),
        HR_OPC_MAP(ATOMIC_FETCH_AND_ADD,        ATOM_FETCH_AND_ADD),
        HR_OPC_MAP(SEND_WITH_INV,               SEND_WITH_INV),
-       HR_OPC_MAP(LOCAL_INV,                   LOCAL_INV),
        HR_OPC_MAP(MASKED_ATOMIC_CMP_AND_SWP,   ATOM_MSK_CMP_AND_SWAP),
        HR_OPC_MAP(MASKED_ATOMIC_FETCH_AND_ADD, ATOM_MSK_FETCH_AND_ADD),
        HR_OPC_MAP(REG_MR,                      FAST_REG_PMR),
@@ -559,9 +558,6 @@ static int set_rc_opcode(struct hns_roce_dev *hr_dev,
                else
                        ret = -EOPNOTSUPP;
                break;
-       case IB_WR_LOCAL_INV:
-               hr_reg_enable(rc_sq_wqe, RC_SEND_WQE_SO);
-               fallthrough;
        case IB_WR_SEND_WITH_INV:
                rc_sq_wqe->inv_key = cpu_to_le32(wr->ex.invalidate_rkey);
                break;
@@ -3222,7 +3218,6 @@ static int hns_roce_v2_write_mtpt(struct hns_roce_dev *hr_dev,
 
        hr_reg_write(mpt_entry, MPT_ST, V2_MPT_ST_VALID);
        hr_reg_write(mpt_entry, MPT_PD, mr->pd);
-       hr_reg_enable(mpt_entry, MPT_L_INV_EN);
 
        hr_reg_write_bool(mpt_entry, MPT_BIND_EN,
                          mr->access & IB_ACCESS_MW_BIND);
@@ -3313,7 +3308,6 @@ static int hns_roce_v2_frmr_write_mtpt(struct hns_roce_dev *hr_dev,
 
        hr_reg_enable(mpt_entry, MPT_RA_EN);
        hr_reg_enable(mpt_entry, MPT_R_INV_EN);
-       hr_reg_enable(mpt_entry, MPT_L_INV_EN);
 
        hr_reg_enable(mpt_entry, MPT_FRE);
        hr_reg_clear(mpt_entry, MPT_MR_MW);
@@ -3345,7 +3339,6 @@ static int hns_roce_v2_mw_write_mtpt(void *mb_buf, struct hns_roce_mw *mw)
        hr_reg_write(mpt_entry, MPT_PD, mw->pdn);
 
        hr_reg_enable(mpt_entry, MPT_R_INV_EN);
-       hr_reg_enable(mpt_entry, MPT_L_INV_EN);
        hr_reg_enable(mpt_entry, MPT_LW_EN);
 
        hr_reg_enable(mpt_entry, MPT_MR_MW);
@@ -3794,7 +3787,6 @@ static const u32 wc_send_op_map[] = {
        HR_WC_OP_MAP(RDMA_READ,                 RDMA_READ),
        HR_WC_OP_MAP(RDMA_WRITE,                RDMA_WRITE),
        HR_WC_OP_MAP(RDMA_WRITE_WITH_IMM,       RDMA_WRITE),
-       HR_WC_OP_MAP(LOCAL_INV,                 LOCAL_INV),
        HR_WC_OP_MAP(ATOM_CMP_AND_SWAP,         COMP_SWAP),
        HR_WC_OP_MAP(ATOM_FETCH_AND_ADD,        FETCH_ADD),
        HR_WC_OP_MAP(ATOM_MSK_CMP_AND_SWAP,     MASKED_COMP_SWAP),
@@ -3844,9 +3836,6 @@ static void fill_send_wc(struct ib_wc *wc, struct hns_roce_v2_cqe *cqe)
        case HNS_ROCE_V2_WQE_OP_RDMA_WRITE_WITH_IMM:
                wc->wc_flags |= IB_WC_WITH_IMM;
                break;
-       case HNS_ROCE_V2_WQE_OP_LOCAL_INV:
-               wc->wc_flags |= IB_WC_WITH_INVALIDATE;
-               break;
        case HNS_ROCE_V2_WQE_OP_ATOM_CMP_AND_SWAP:
        case HNS_ROCE_V2_WQE_OP_ATOM_FETCH_AND_ADD:
        case HNS_ROCE_V2_WQE_OP_ATOM_MSK_CMP_AND_SWAP:

diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
index b11579027e82793da2c2c8e43734b3713d53a793..c7bf2d52c1cdb254ffe3dbbacfcf061944679909 100644 (file)
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
@@ -179,7 +179,6 @@ enum {
        HNS_ROCE_V2_WQE_OP_ATOM_MSK_CMP_AND_SWAP        = 0x8,
        HNS_ROCE_V2_WQE_OP_ATOM_MSK_FETCH_AND_ADD       = 0x9,
        HNS_ROCE_V2_WQE_OP_FAST_REG_PMR                 = 0xa,
-       HNS_ROCE_V2_WQE_OP_LOCAL_INV                    = 0xb,
        HNS_ROCE_V2_WQE_OP_BIND_MW                      = 0xc,
        HNS_ROCE_V2_WQE_OP_MASK                         = 0x1f,
 };
@@ -915,7 +914,6 @@ struct hns_roce_v2_rc_send_wqe {
 #define RC_SEND_WQE_OWNER RC_SEND_WQE_FIELD_LOC(7, 7)
 #define RC_SEND_WQE_CQE RC_SEND_WQE_FIELD_LOC(8, 8)
 #define RC_SEND_WQE_FENCE RC_SEND_WQE_FIELD_LOC(9, 9)
-#define RC_SEND_WQE_SO RC_SEND_WQE_FIELD_LOC(10, 10)
 #define RC_SEND_WQE_SE RC_SEND_WQE_FIELD_LOC(11, 11)
 #define RC_SEND_WQE_INLINE RC_SEND_WQE_FIELD_LOC(12, 12)
 #define RC_SEND_WQE_WQE_INDEX RC_SEND_WQE_FIELD_LOC(30, 15)