arm64: dts: rockchip: Remove bogus "amba" bus nodes
authorRobin Murphy <robin.murphy@arm.com>
Wed, 20 Jan 2021 23:42:21 +0000 (23:42 +0000)
committerHeiko Stuebner <heiko@sntech.de>
Mon, 1 Feb 2021 18:00:31 +0000 (19:00 +0100)
The "amba" bus nodes wrapping all the DMA-330 nodes serve no useful
purpose, and certainly bear no relation at all to the actual underlying
interconnect topology. They appear to be cargo-cult copying from a
design misstep in the very early days of FDT adoption on ARM, which was
righted with the "arm,primecell" compatible, and the last trace of the
idea finally purged by commit 2ef7d5f342c1 ("ARM, ARM64: dts: drop
"arm,amba-bus" in favor of "simple-bus"").

As such, they can simply be removed and the DMA-330 nodes fitted into
the normal sort order.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/131e0ea065109760ea3b59c4bb90cf4fac7826f7.1611186142.git.robin.murphy@arm.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/px30.dtsi
arch/arm64/boot/dts/rockchip/rk3308.dtsi
arch/arm64/boot/dts/rockchip/rk3328.dtsi
arch/arm64/boot/dts/rockchip/rk3368.dtsi
arch/arm64/boot/dts/rockchip/rk3399.dtsi

index 6a3e57761b2576293e1e89cac6a494b3d76c1f46..f2ce48f5b4e4d8700d49ab4a9e9ff7e09db0677f 100644 (file)
                clock-names = "pclk", "timer";
        };
 
-       amba: bus {
-               compatible = "simple-bus";
-               #address-cells = <2>;
-               #size-cells = <2>;
-               ranges;
-
-               dmac: dmac@ff240000 {
-                       compatible = "arm,pl330", "arm,primecell";
-                       reg = <0x0 0xff240000 0x0 0x4000>;
-                       interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
-                       arm,pl330-periph-burst;
-                       clocks = <&cru ACLK_DMAC>;
-                       clock-names = "apb_pclk";
-                       #dma-cells = <1>;
-               };
+       dmac: dmac@ff240000 {
+               compatible = "arm,pl330", "arm,primecell";
+               reg = <0x0 0xff240000 0x0 0x4000>;
+               interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+               arm,pl330-periph-burst;
+               clocks = <&cru ACLK_DMAC>;
+               clock-names = "apb_pclk";
+               #dma-cells = <1>;
        };
 
        tsadc: tsadc@ff280000 {
index 7211fab7a6e40432e0882b3617cc404ce07078fa..4ea32e8f33d2b8abbe86355d8038fd9f52958cc0 100644 (file)
                status = "disabled";
        };
 
-       amba: bus {
-               compatible = "simple-bus";
-               #address-cells = <2>;
-               #size-cells = <2>;
-               ranges;
+       dmac0: dma-controller@ff2c0000 {
+               compatible = "arm,pl330", "arm,primecell";
+               reg = <0x0 0xff2c0000 0x0 0x4000>;
+               interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+               arm,pl330-periph-burst;
+               clocks = <&cru ACLK_DMAC0>;
+               clock-names = "apb_pclk";
+               #dma-cells = <1>;
+       };
 
-               dmac0: dma-controller@ff2c0000 {
-                       compatible = "arm,pl330", "arm,primecell";
-                       reg = <0x0 0xff2c0000 0x0 0x4000>;
-                       interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
-                       arm,pl330-periph-burst;
-                       clocks = <&cru ACLK_DMAC0>;
-                       clock-names = "apb_pclk";
-                       #dma-cells = <1>;
-               };
-
-               dmac1: dma-controller@ff2d0000 {
-                       compatible = "arm,pl330", "arm,primecell";
-                       reg = <0x0 0xff2d0000 0x0 0x4000>;
-                       interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
-                       arm,pl330-periph-burst;
-                       clocks = <&cru ACLK_DMAC1>;
-                       clock-names = "apb_pclk";
-                       #dma-cells = <1>;
-               };
+       dmac1: dma-controller@ff2d0000 {
+               compatible = "arm,pl330", "arm,primecell";
+               reg = <0x0 0xff2d0000 0x0 0x4000>;
+               interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+               arm,pl330-periph-burst;
+               clocks = <&cru ACLK_DMAC1>;
+               clock-names = "apb_pclk";
+               #dma-cells = <1>;
        };
 
        i2s_2ch_0: i2s@ff350000 {
index 17709faf651beab11863fae02c84d0a23b99e50b..063ed0adbec42ed15a125866b133a0421ba21632 100644 (file)
                };
        };
 
-       amba: bus {
-               compatible = "simple-bus";
-               #address-cells = <2>;
-               #size-cells = <2>;
-               ranges;
-
-               dmac: dmac@ff1f0000 {
-                       compatible = "arm,pl330", "arm,primecell";
-                       reg = <0x0 0xff1f0000 0x0 0x4000>;
-                       interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
-                       arm,pl330-periph-burst;
-                       clocks = <&cru ACLK_DMAC>;
-                       clock-names = "apb_pclk";
-                       #dma-cells = <1>;
-               };
-       };
-
        analog_sound: analog-sound {
                compatible = "simple-audio-card";
                simple-audio-card,format = "i2s";
                status = "disabled";
        };
 
+       dmac: dmac@ff1f0000 {
+               compatible = "arm,pl330", "arm,primecell";
+               reg = <0x0 0xff1f0000 0x0 0x4000>;
+               interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+               arm,pl330-periph-burst;
+               clocks = <&cru ACLK_DMAC>;
+               clock-names = "apb_pclk";
+               #dma-cells = <1>;
+       };
+
        thermal-zones {
                soc_thermal: soc-thermal {
                        polling-delay-passive = <20>;
index f6be54fdaa34bfc6019622e2b9ac011579dec243..023ac25d69b7c15645aec44c68d1f4f7e696580e 100644 (file)
                };
        };
 
-       amba: bus {
-               compatible = "simple-bus";
-               #address-cells = <2>;
-               #size-cells = <2>;
-               ranges;
-
-               dmac_peri: dma-controller@ff250000 {
-                       compatible = "arm,pl330", "arm,primecell";
-                       reg = <0x0 0xff250000 0x0 0x4000>;
-                       interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
-                       #dma-cells = <1>;
-                       arm,pl330-broken-no-flushp;
-                       arm,pl330-periph-burst;
-                       clocks = <&cru ACLK_DMAC_PERI>;
-                       clock-names = "apb_pclk";
-               };
-
-               dmac_bus: dma-controller@ff600000 {
-                       compatible = "arm,pl330", "arm,primecell";
-                       reg = <0x0 0xff600000 0x0 0x4000>;
-                       interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
-                       #dma-cells = <1>;
-                       arm,pl330-broken-no-flushp;
-                       arm,pl330-periph-burst;
-                       clocks = <&cru ACLK_DMAC_BUS>;
-                       clock-names = "apb_pclk";
-               };
-       };
-
        arm-pmu {
                compatible = "arm,armv8-pmuv3";
                interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
                status = "disabled";
        };
 
+       dmac_peri: dma-controller@ff250000 {
+               compatible = "arm,pl330", "arm,primecell";
+               reg = <0x0 0xff250000 0x0 0x4000>;
+               interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+               #dma-cells = <1>;
+               arm,pl330-broken-no-flushp;
+               arm,pl330-periph-burst;
+               clocks = <&cru ACLK_DMAC_PERI>;
+               clock-names = "apb_pclk";
+       };
+
        thermal-zones {
                cpu_thermal: cpu-thermal {
                        polling-delay-passive = <100>; /* milliseconds */
                status = "disabled";
        };
 
+       dmac_bus: dma-controller@ff600000 {
+               compatible = "arm,pl330", "arm,primecell";
+               reg = <0x0 0xff600000 0x0 0x4000>;
+               interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+               #dma-cells = <1>;
+               arm,pl330-broken-no-flushp;
+               arm,pl330-periph-burst;
+               clocks = <&cru ACLK_DMAC_BUS>;
+               clock-names = "apb_pclk";
+       };
+
        i2c0: i2c@ff650000 {
                compatible = "rockchip,rk3368-i2c", "rockchip,rk3288-i2c";
                reg = <0x0 0xff650000 0x0 0x1000>;
index fba9bcb3a08dcf8084e1572e0f569fd71b209827..4fa54c331982f0b6def82f90df955bf54dae5cfc 100644 (file)
                #clock-cells = <0>;
        };
 
-       amba: bus {
-               compatible = "simple-bus";
-               #address-cells = <2>;
-               #size-cells = <2>;
-               ranges;
-
-               dmac_bus: dma-controller@ff6d0000 {
-                       compatible = "arm,pl330", "arm,primecell";
-                       reg = <0x0 0xff6d0000 0x0 0x4000>;
-                       interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH 0>,
-                                    <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH 0>;
-                       #dma-cells = <1>;
-                       arm,pl330-periph-burst;
-                       clocks = <&cru ACLK_DMAC0_PERILP>;
-                       clock-names = "apb_pclk";
-               };
-
-               dmac_peri: dma-controller@ff6e0000 {
-                       compatible = "arm,pl330", "arm,primecell";
-                       reg = <0x0 0xff6e0000 0x0 0x4000>;
-                       interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH 0>,
-                                    <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH 0>;
-                       #dma-cells = <1>;
-                       arm,pl330-periph-burst;
-                       clocks = <&cru ACLK_DMAC1_PERILP>;
-                       clock-names = "apb_pclk";
-               };
-       };
-
        pcie0: pcie@f8000000 {
                compatible = "rockchip,rk3399-pcie";
                reg = <0x0 0xf8000000 0x0 0x2000000>,
                };
        };
 
+       dmac_bus: dma-controller@ff6d0000 {
+               compatible = "arm,pl330", "arm,primecell";
+               reg = <0x0 0xff6d0000 0x0 0x4000>;
+               interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH 0>,
+                            <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH 0>;
+               #dma-cells = <1>;
+               arm,pl330-periph-burst;
+               clocks = <&cru ACLK_DMAC0_PERILP>;
+               clock-names = "apb_pclk";
+       };
+
+       dmac_peri: dma-controller@ff6e0000 {
+               compatible = "arm,pl330", "arm,primecell";
+               reg = <0x0 0xff6e0000 0x0 0x4000>;
+               interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH 0>,
+                            <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH 0>;
+               #dma-cells = <1>;
+               arm,pl330-periph-burst;
+               clocks = <&cru ACLK_DMAC1_PERILP>;
+               clock-names = "apb_pclk";
+       };
+
        pmucru: pmu-clock-controller@ff750000 {
                compatible = "rockchip,rk3399-pmucru";
                reg = <0x0 0xff750000 0x0 0x1000>;