drm/dp: Pass drm_dp_aux to drm_dp_link_train_clock_recovery_delay()

So that we can start using drm_dbg_*() in
drm_dp_link_train_clock_recovery_delay().

Signed-off-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210423184309.207645-6-lyude@redhat.com
Reviewed-by: Dave Airlie <airlied@redhat.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/atombios_dp.c b/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
index 062625a8a4ece24880869927de411d3e5257d413..92d76f4cfdfc423560654d7fe9d88d543ff49b76 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
+++ b/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
@@ -612,7 +612,7 @@ amdgpu_atombios_dp_link_train_cr(struct amdgpu_atombios_dp_link_train_info *dp_i
        dp_info->tries = 0;
        voltage = 0xff;
        while (1) {
-               drm_dp_link_train_clock_recovery_delay(dp_info->dpcd);
+               drm_dp_link_train_clock_recovery_delay(dp_info->aux, dp_info->dpcd);
 
                if (drm_dp_dpcd_read_link_status(dp_info->aux,
                                                 dp_info->link_status) <= 0) {

diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 9f66153a3c55376e1fd4cac60b2efead9ddb4754..f71b035a48b41c4a35888d6dc271d5a0ff3b8a19 100644 (file)
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -132,7 +132,8 @@ u8 drm_dp_get_adjust_request_post_cursor(const u8 link_status[DP_LINK_STATUS_SIZ
 }
 EXPORT_SYMBOL(drm_dp_get_adjust_request_post_cursor);
 
-void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
+void drm_dp_link_train_clock_recovery_delay(const struct drm_dp_aux *aux,
+                                           const u8 dpcd[DP_RECEIVER_CAP_SIZE])
 {
        unsigned long rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
                                         DP_TRAINING_AUX_RD_MASK;

diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 5e9c3c74310ca18c2ae92f38c196cc8a2f5002d1..f543b494f0526e6630d10e9ee27b4ec179eb8165 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -513,7 +513,7 @@ static void intel_dp_link_training_clock_recovery_delay(struct intel_dp *intel_d
                                                        enum drm_dp_phy dp_phy)
 {
        if (dp_phy == DP_PHY_DPRX)
-               drm_dp_link_train_clock_recovery_delay(intel_dp->dpcd);
+               drm_dp_link_train_clock_recovery_delay(&intel_dp->aux, intel_dp->dpcd);
        else
                drm_dp_lttpr_link_train_clock_recovery_delay();
 }

diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
index 1390f3547fde4314d31ed9fea0b2c1a73c0662e3..264a9eae87d37bec750e6867839bce8f0fc2bf39 100644 (file)
--- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
@@ -1103,7 +1103,7 @@ static int dp_ctrl_link_train_1(struct dp_ctrl_private *ctrl,
        tries = 0;
        old_v_level = ctrl->link->phy_params.v_level;
        for (tries = 0; tries < maximum_retries; tries++) {
-               drm_dp_link_train_clock_recovery_delay(ctrl->panel->dpcd);
+               drm_dp_link_train_clock_recovery_delay(ctrl->aux, ctrl->panel->dpcd);
 
                ret = dp_ctrl_read_link_status(ctrl, link_status);
                if (ret)

diff --git a/drivers/gpu/drm/msm/edp/edp_ctrl.c b/drivers/gpu/drm/msm/edp/edp_ctrl.c
index 57af3d8b6699ccbfb41ad8fe484bc08443e19460..6501598448b41b76a5725dd19d3853686bc02c9b 100644 (file)
--- a/drivers/gpu/drm/msm/edp/edp_ctrl.c
+++ b/drivers/gpu/drm/msm/edp/edp_ctrl.c
@@ -608,7 +608,7 @@ static int edp_start_link_train_1(struct edp_ctrl *ctrl)
        tries = 0;
        old_v_level = ctrl->v_level;
        while (1) {
-               drm_dp_link_train_clock_recovery_delay(ctrl->dpcd);
+               drm_dp_link_train_clock_recovery_delay(ctrl->drm_aux, ctrl->dpcd);
 
                rlen = drm_dp_dpcd_read_link_status(ctrl->drm_aux, link_status);
                if (rlen < DP_LINK_STATUS_SIZE) {

diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c
index c50c504bad503ee221fd2b6906c85d72a382e4f0..299b9d8da376db3b2f0b4a62388c7adfd9419b3b 100644 (file)
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/drivers/gpu/drm/radeon/atombios_dp.c
@@ -680,7 +680,7 @@ static int radeon_dp_link_train_cr(struct radeon_dp_link_train_info *dp_info)
        dp_info->tries = 0;
        voltage = 0xff;
        while (1) {
-               drm_dp_link_train_clock_recovery_delay(dp_info->dpcd);
+               drm_dp_link_train_clock_recovery_delay(dp_info->aux, dp_info->dpcd);
 
                if (drm_dp_dpcd_read_link_status(dp_info->aux,
                                                 dp_info->link_status) <= 0) {

diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp_dp.c
index 7e5e893050284573b1bbe531bbe0b844a758cd4d..e75f67cbae693b3539699ae8d07819f0b5028cb5 100644 (file)
--- a/drivers/gpu/drm/xlnx/zynqmp_dp.c
+++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c
@@ -713,7 +713,7 @@ static int zynqmp_dp_link_train_cr(struct zynqmp_dp *dp)
                if (ret)
                        return ret;
 
-               drm_dp_link_train_clock_recovery_delay(dp->dpcd);
+               drm_dp_link_train_clock_recovery_delay(&dp->aux, dp->dpcd);
                ret = drm_dp_dpcd_read_link_status(&dp->aux, link_status);
                if (ret < 0)
                        return ret;

diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 95efe37ea9ca5711938410ea1315c2fb7d01c535..675ad0029699c04d816871a427b452d6af78169a 100644 (file)
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -29,6 +29,7 @@
 #include <drm/drm_connector.h>
 
 struct drm_device;
+struct drm_dp_aux;
 
 /*
  * Unless otherwise noted, all values are from the DP 1.1a spec.  Note that
@@ -1482,7 +1483,8 @@ u8 drm_dp_get_adjust_request_post_cursor(const u8 link_status[DP_LINK_STATUS_SIZ
 #define DP_LTTPR_COMMON_CAP_SIZE       8
 #define DP_LTTPR_PHY_CAP_SIZE          3
 
-void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
+void drm_dp_link_train_clock_recovery_delay(const struct drm_dp_aux *aux,
+                                           const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
 void drm_dp_lttpr_link_train_clock_recovery_delay(void);
 void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
 void drm_dp_lttpr_link_train_channel_eq_delay(const u8 caps[DP_LTTPR_PHY_CAP_SIZE]);