drm/amd/display: Reorder dc_state fields to optimize clearing the struct

[why & how]
By moving bw_ctx field to the end of the dc_state the state can be
cleared more efficiently without resulting in large DML memcpy
operations, resulting in better mode enumeration performance on some
platforms.

Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
index 525f8f0b8732a5de3aa557a90d44ff56537dedc4..b093ea49546825b9dd2a1fbd0009c5cfae1e96b4 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
@@ -546,15 +546,6 @@ struct dc_state {
         */
        struct resource_context res_ctx;
 
-       /**
-        * @bw_ctx: The output from bandwidth and watermark calculations and the DML
-        *
-        * Each context must have its own instance of VBA, and in order to
-        * initialize and obtain IP and SOC, the base DML instance from DC is
-        * initially copied into every context.
-        */
-       struct bw_context bw_ctx;
-
        /**
         * @pp_display_cfg: PowerPlay clocks and settings
         * Note: this is a big struct, do *not* put on stack!
@@ -569,6 +560,15 @@ struct dc_state {
 
        struct clk_mgr *clk_mgr;
 
+       /**
+        * @bw_ctx: The output from bandwidth and watermark calculations and the DML
+        *
+        * Each context must have its own instance of VBA, and in order to
+        * initialize and obtain IP and SOC, the base DML instance from DC is
+        * initially copied into every context.
+        */
+       struct bw_context bw_ctx;
+
        /**
         * @refcount: refcount reference
         *