wifi: rtw89: pci: correct interrupt mitigation register for 8852CE
authorPing-Ke Shih <pkshih@realtek.com>
Fri, 10 Nov 2023 01:23:18 +0000 (09:23 +0800)
committerKalle Valo <kvalo@kernel.org>
Tue, 14 Nov 2023 10:22:42 +0000 (12:22 +0200)
To reduce interrupt count, configure mitigation register with thresholds
of time and packet count. We missed that 8852CE uses different register
address, so correct it. Then, interrupt counts down to 30,763 from 229,825
during stress test in 20 seconds.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20231110012319.12727-7-pkshih@realtek.com
drivers/net/wireless/realtek/rtw89/pci.c
drivers/net/wireless/realtek/rtw89/pci.h
drivers/net/wireless/realtek/rtw89/rtw8851be.c
drivers/net/wireless/realtek/rtw89/rtw8852ae.c
drivers/net/wireless/realtek/rtw89/rtw8852be.c
drivers/net/wireless/realtek/rtw89/rtw8852ce.c

index 9c6d55af8c8eaf7694d91913c9eb29b34d835944..09de12a9e3c2aa2a61c99a0c78b3a103e63d2d24 100644 (file)
@@ -3620,6 +3620,7 @@ static void rtw89_pci_aspm_set(struct rtw89_dev *rtwdev, bool enable)
 
 static void rtw89_pci_recalc_int_mit(struct rtw89_dev *rtwdev)
 {
+       const struct rtw89_pci_info *info = rtwdev->pci_info;
        struct rtw89_traffic_stats *stats = &rtwdev->stats;
        enum rtw89_tfc_lv tx_tfc_lv = stats->tx_tfc_lv;
        enum rtw89_tfc_lv rx_tfc_lv = stats->rx_tfc_lv;
@@ -3632,7 +3633,7 @@ static void rtw89_pci_recalc_int_mit(struct rtw89_dev *rtwdev)
                      FIELD_PREP(B_AX_RXTIMER_UNIT_MASK, AX_RXTIMER_UNIT_64US) |
                      FIELD_PREP(B_AX_RXTIMER_MATCH_MASK, 2048 / 64);
 
-       rtw89_write32(rtwdev, R_AX_INT_MIT_RX, val);
+       rtw89_write32(rtwdev, info->mit_addr, val);
 }
 
 static void rtw89_pci_link_cfg(struct rtw89_dev *rtwdev)
index d2a0a9aa4da34a439fef727df5b815550710745e..e2d8eef52b20e038bfeb4ab202e448cf985877ef 100644 (file)
 #define B_AX_RXCOUNTER_MATCH_MASK      GENMASK(15, 8)
 #define B_AX_RXTIMER_MATCH_MASK                GENMASK(7, 0)
 
+#define R_AX_INT_MIT_RX_V1 0x1184
+#define B_AX_RXMIT_RXP2_SEL_V1 BIT(19)
+#define B_AX_RXMIT_RXP1_SEL_V1 BIT(18)
+#define B_AX_MIT_RXTIMER_UNIT_MASK GENMASK(17, 16)
+#define B_AX_MIT_RXCOUNTER_MATCH_MASK GENMASK(15, 8)
+#define B_AX_MIT_RXTIMER_MATCH_MASK GENMASK(7, 0)
+
 #define R_AX_DBG_ERR_FLAG              0x11C4
 #define B_AX_PCIE_RPQ_FULL             BIT(29)
 #define B_AX_PCIE_RXQ_FULL             BIT(28)
@@ -1241,6 +1248,7 @@ struct rtw89_pci_info {
 
        u32 rpwm_addr;
        u32 cpwm_addr;
+       u32 mit_addr;
        u32 tx_dma_ch_mask;
        const struct rtw89_pci_bd_idx_addr *bd_idx_addr_low_power;
        const struct rtw89_pci_ch_dma_addr_set *dma_addr_set;
index 6858fd7600135c012209c68356e6b551c6545813..ade69bd30fc8654a6b78e924fda930b9f6055689 100644 (file)
@@ -43,6 +43,7 @@ static const struct rtw89_pci_info rtw8851b_pci_info = {
 
        .rpwm_addr              = R_AX_PCIE_HRPWM,
        .cpwm_addr              = R_AX_CPWM,
+       .mit_addr               = R_AX_INT_MIT_RX,
        .tx_dma_ch_mask         = BIT(RTW89_TXCH_ACH4) | BIT(RTW89_TXCH_ACH5) |
                                  BIT(RTW89_TXCH_ACH6) | BIT(RTW89_TXCH_ACH7) |
                                  BIT(RTW89_TXCH_CH10) | BIT(RTW89_TXCH_CH11),
index f539f4602c0271751663fe62505d73cfc507b480..f1e890bde0499dfba47b90c3689d4d8437b575f5 100644 (file)
@@ -44,6 +44,7 @@ static const struct rtw89_pci_info rtw8852a_pci_info = {
 
        .rpwm_addr              = R_AX_PCIE_HRPWM,
        .cpwm_addr              = R_AX_CPWM,
+       .mit_addr               = R_AX_INT_MIT_RX,
        .tx_dma_ch_mask         = 0,
        .bd_idx_addr_low_power  = NULL,
        .dma_addr_set           = &rtw89_pci_ch_dma_addr_set,
index b9bbb6e9b4ff4c6257442c0c6e63f726cc2de41b..920b20bbcfb733f9021d22a917e043fb7100d2b1 100644 (file)
@@ -44,6 +44,7 @@ static const struct rtw89_pci_info rtw8852b_pci_info = {
 
        .rpwm_addr              = R_AX_PCIE_HRPWM,
        .cpwm_addr              = R_AX_CPWM,
+       .mit_addr               = R_AX_INT_MIT_RX,
        .tx_dma_ch_mask         = BIT(RTW89_TXCH_ACH4) | BIT(RTW89_TXCH_ACH5) |
                                  BIT(RTW89_TXCH_ACH6) | BIT(RTW89_TXCH_ACH7) |
                                  BIT(RTW89_TXCH_CH10) | BIT(RTW89_TXCH_CH11),
index f6bf35342719fe466715a97040f3705f67f91922..4592de3dbd9424b738bc40cb64dc8c1e476c6066 100644 (file)
@@ -53,6 +53,7 @@ static const struct rtw89_pci_info rtw8852c_pci_info = {
 
        .rpwm_addr              = R_AX_PCIE_HRPWM_V1,
        .cpwm_addr              = R_AX_PCIE_CRPWM,
+       .mit_addr               = R_AX_INT_MIT_RX_V1,
        .tx_dma_ch_mask         = 0,
        .bd_idx_addr_low_power  = &rtw8852c_bd_idx_addr_low_power,
        .dma_addr_set           = &rtw89_pci_ch_dma_addr_set_v1,