drm/i915/guc: Route semaphores to GuC for Gen12+

In GuC submission mode, there is an option to use auto-switch out
semaphores and have GuC auto-switch in a waiting context. This
requires routing the semaphore interrupt to GuC.

Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220728024225.2363663-2-John.C.Harrison@Intel.com

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h
index 8dc063f087eb15add9f2a3155eea46f0832f9d85..a7092f711e9cd67e1f5105313b654e398ec8f426 100644 (file)
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h
@@ -102,6 +102,10 @@
 #define   GUC_SEND_TRIGGER               (1<<0)
 #define GEN11_GUC_HOST_INTERRUPT       _MMIO(0x1901f0)
 
+#define GEN12_GUC_SEM_INTR_ENABLES     _MMIO(0xc71c)
+#define   GUC_SEM_INTR_ROUTE_TO_GUC    BIT(31)
+#define   GUC_SEM_INTR_ENABLE_ALL      (0xff)
+
 #define GUC_NUM_DOORBELLS              256
 
 /* format of the HW-monitored doorbell cacheline */

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 76916aed897ad0e767934d953cd4026593e900c3..0b8c6450fa344e46ace847c8fe97c643ad0eabf1 100644 (file)
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -4191,13 +4191,27 @@ int intel_guc_submission_setup(struct intel_engine_cs *engine)
 
 void intel_guc_submission_enable(struct intel_guc *guc)
 {
+       struct intel_gt *gt = guc_to_gt(guc);
+
+       /* Enable and route to GuC */
+       if (GRAPHICS_VER(gt->i915) >= 12)
+               intel_uncore_write(gt->uncore, GEN12_GUC_SEM_INTR_ENABLES,
+                                  GUC_SEM_INTR_ROUTE_TO_GUC |
+                                  GUC_SEM_INTR_ENABLE_ALL);
+
        guc_init_lrc_mapping(guc);
        guc_init_engine_stats(guc);
 }
 
 void intel_guc_submission_disable(struct intel_guc *guc)
 {
+       struct intel_gt *gt = guc_to_gt(guc);
+
        /* Note: By the time we're here, GuC may have already been reset */
+
+       /* Disable and route to host */
+       if (GRAPHICS_VER(gt->i915) >= 12)
+               intel_uncore_write(gt->uncore, GEN12_GUC_SEM_INTR_ENABLES, 0x0);
 }
 
 static bool __guc_submission_supported(struct intel_guc *guc)