drm/xe/xe2_lpg: Add Wa_16018610683
authorShekhar Chauhan <shekhar.chauhan@intel.com>
Tue, 9 Jan 2024 05:55:50 +0000 (11:25 +0530)
committerMatt Roper <matthew.d.roper@intel.com>
Tue, 9 Jan 2024 18:39:43 +0000 (10:39 -0800)
Force max 128KB SLM during WMTP PASS1 Restore.

BSpec: 70202
Signed-off-by: Shekhar Chauhan <shekhar.chauhan@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20240109055550.679289-1-shekhar.chauhan@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
drivers/gpu/drm/xe/regs/xe_gt_regs.h
drivers/gpu/drm/xe/xe_wa.c

index 6dfad86aaea647151c5f58f622bbce715ac327de..4017319c63000f4f569f3804f83707fd93cb919d 100644 (file)
 #define ROW_CHICKEN3                           XE_REG_MCR(0xe49c, XE_REG_OPTION_MASKED)
 #define   DIS_FIX_EOT1_FLUSH                   REG_BIT(9)
 
+#define TDL_TSL_CHICKEN                                XE_REG_MCR(0xe4c4, XE_REG_OPTION_MASKED)
+#define   SLM_WMTP_RESTORE                     REG_BIT(11)
+
 #define ROW_CHICKEN                            XE_REG_MCR(0xe4f0, XE_REG_OPTION_MASKED)
 #define   UGM_BACKUP_MODE                      REG_BIT(13)
 #define   MDQ_ARBITRATION_MODE                 REG_BIT(12)
index b77d406e083e2d46368d3d6f81afd126f50c30f9..3299130ba10ae0ec87427b13af4ee414b70e72e4 100644 (file)
@@ -455,7 +455,10 @@ static const struct xe_rtp_entry_sr engine_was[] = {
                             PPHWSP_CSB_AND_TIMESTAMP_REPORT_DIS,
                             XE_RTP_ACTION_FLAG(ENGINE_BASE)))
        },
-
+       { XE_RTP_NAME("16018610683"),
+         XE_RTP_RULES(GRAPHICS_VERSION(2004), FUNC(xe_rtp_match_first_render_or_compute)),
+         XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, SLM_WMTP_RESTORE))
+       },
        {}
 };