net: dsa: qca8k: add missing check return value in qca8k_phylink_mac_config()
authorYang Yingliang <yangyingliang@huawei.com>
Sat, 29 May 2021 03:04:39 +0000 (11:04 +0800)
committerJakub Kicinski <kuba@kernel.org>
Sun, 30 May 2021 21:22:31 +0000 (14:22 -0700)
Now we can check qca8k_read() return value correctly, so if
it fails, we need return directly.

Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/dsa/qca8k.c

index d761c5947222fce8dadbb06f7f64fee2e2afa98e..6fe963ba23e8e6c46ec82c19e1b17a2a9675874e 100644 (file)
@@ -1128,6 +1128,7 @@ qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
 {
        struct qca8k_priv *priv = ds->priv;
        u32 reg, val;
+       int ret;
 
        switch (port) {
        case 0: /* 1st CPU port */
@@ -1198,7 +1199,9 @@ qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
                qca8k_write(priv, reg, QCA8K_PORT_PAD_SGMII_EN);
 
                /* Enable/disable SerDes auto-negotiation as necessary */
-               qca8k_read(priv, QCA8K_REG_PWS, &val);
+               ret = qca8k_read(priv, QCA8K_REG_PWS, &val);
+               if (ret)
+                       return;
                if (phylink_autoneg_inband(mode))
                        val &= ~QCA8K_PWS_SERDES_AEN_DIS;
                else
@@ -1206,7 +1209,9 @@ qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
                qca8k_write(priv, QCA8K_REG_PWS, val);
 
                /* Configure the SGMII parameters */
-               qca8k_read(priv, QCA8K_REG_SGMII_CTRL, &val);
+               ret = qca8k_read(priv, QCA8K_REG_SGMII_CTRL, &val);
+               if (ret)
+                       return;
 
                val |= QCA8K_SGMII_EN_PLL | QCA8K_SGMII_EN_RX |
                        QCA8K_SGMII_EN_TX | QCA8K_SGMII_EN_SD;